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authordrahn <drahn@openbsd.org>2011-05-22 22:36:53 +0000
committerdrahn <drahn@openbsd.org>2011-05-22 22:36:53 +0000
commit7a8a141795ec8319961ce08d33f46cc5424c490a (patch)
tree0431bdc2da842da1d9b73fa57848dea490c7d479
parenttweak previous; (diff)
downloadwireguard-openbsd-7a8a141795ec8319961ce08d33f46cc5424c490a.tar.xz
wireguard-openbsd-7a8a141795ec8319961ce08d33f46cc5424c490a.zip
Fix a problem found where one SOC has a uart implementation that causes bus
errors if the fifo is read when the fifo is empty. Dont read an empty fifo. ok deraaadt@ fgsch@
-rw-r--r--sys/dev/ic/com.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/sys/dev/ic/com.c b/sys/dev/ic/com.c
index a85ddb5989d..03769a08109 100644
--- a/sys/dev/ic/com.c
+++ b/sys/dev/ic/com.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: com.c,v 1.146 2011/03/23 15:51:11 fgsch Exp $ */
+/* $OpenBSD: com.c,v 1.147 2011/05/22 22:36:53 drahn Exp $ */
/* $NetBSD: com.c,v 1.82.4.1 1996/06/02 09:08:00 mrg Exp $ */
/*
@@ -538,7 +538,8 @@ compwroff(struct com_softc *sc)
*/
bus_space_write_1(iot, ioh, com_fifo, 0);
delay(100);
- (void) bus_space_read_1(iot, ioh, com_data);
+ if (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
+ (void) bus_space_read_1(iot, ioh, com_data);
delay(100);
bus_space_write_1(iot, ioh, com_fifo,
FIFO_RCV_RST | FIFO_XMT_RST);