diff options
| author |   jsg <jsg@openbsd.org> | 2020-02-10 03:08:58 +0000 |
|---|---|---|
| committer | jsg <jsg@openbsd.org> | 2020-02-10 03:08:58 +0000 |
| commit | 7ab046e3652593849c7c5709cf472b3f26fff3df (patch) | |
| tree | 22855f83c80a1cc26df10a88be2ec4ed0c920042 | |
| parent | Rename WAV_H "include guard" macro of afile.h to AFILE_H. (diff) | |
| download | wireguard-openbsd-7ab046e3652593849c7c5709cf472b3f26fff3df.tar.xz wireguard-openbsd-7ab046e3652593849c7c5709cf472b3f26fff3df.zip | |
When attempting to disabe TSX avoid uninitialised var use for Intel cpus
with cpuid_level < 7.
Problem reported by Anthony Steinhauser.
| -rw-r--r-- | sys/arch/amd64/amd64/cpu.c | 8 | ||||
| -rw-r--r-- | sys/arch/i386/i386/cpu.c | 8 |
2 files changed, 10 insertions, 6 deletions
diff --git a/sys/arch/amd64/amd64/cpu.c b/sys/arch/amd64/amd64/cpu.c index 48ab6b5e7f3..403805654e0 100644 --- a/sys/arch/amd64/amd64/cpu.c +++ b/sys/arch/amd64/amd64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.143 2019/12/20 07:49:31 jsg Exp $ */ +/* $OpenBSD: cpu.c,v 1.144 2020/02/10 03:08:58 jsg Exp $ */ /* $NetBSD: cpu.c,v 1.1 2003/04/26 18:39:26 fvdl Exp $ */ /*- @@ -1167,8 +1167,10 @@ cpu_tsx_disable(struct cpu_info *ci) uint32_t dummy, sefflags_edx; /* this runs before identifycpu() populates ci_feature_sefflags_edx */ - if (cpuid_level >= 0x07) - CPUID_LEAF(0x7, 0, dummy, dummy, dummy, sefflags_edx); + if (cpuid_level < 0x07) + return; + CPUID_LEAF(0x7, 0, dummy, dummy, dummy, sefflags_edx); + if (strcmp(cpu_vendor, "GenuineIntel") == 0 && (sefflags_edx & SEFF0EDX_ARCH_CAP)) { msr = rdmsr(MSR_ARCH_CAPABILITIES); diff --git a/sys/arch/i386/i386/cpu.c b/sys/arch/i386/i386/cpu.c index b31a431c594..f9d004a23e0 100644 --- a/sys/arch/i386/i386/cpu.c +++ b/sys/arch/i386/i386/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.98 2019/12/20 07:55:30 jsg Exp $ */ +/* $OpenBSD: cpu.c,v 1.99 2020/02/10 03:08:58 jsg Exp $ */ /* $NetBSD: cpu.c,v 1.1.2.7 2000/06/26 02:04:05 sommerfeld Exp $ */ /*- @@ -476,8 +476,10 @@ cpu_tsx_disable(struct cpu_info *ci) uint32_t dummy, sefflags_edx; /* this runs before identifycpu() populates ci_feature_sefflags_edx */ - if (cpuid_level >= 0x07) - CPUID_LEAF(0x7, 0, dummy, dummy, dummy, sefflags_edx); + if (cpuid_level < 0x07) + return; + CPUID_LEAF(0x7, 0, dummy, dummy, dummy, sefflags_edx); + if (strcmp(cpu_vendor, "GenuineIntel") == 0 && (sefflags_edx & SEFF0EDX_ARCH_CAP)) { msr = rdmsr(MSR_ARCH_CAPABILITIES); |