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authordownsj <downsj@openbsd.org>1998-11-17 04:25:21 +0000
committerdownsj <downsj@openbsd.org>1998-11-17 04:25:21 +0000
commit819aaafa28c6aac10fd34d71b033ab1ed7912de7 (patch)
tree5a65d41d7b9608581feb360919af195b58adc9a4
parentman updates from ncurses-4.2-981114 (diff)
downloadwireguard-openbsd-819aaafa28c6aac10fd34d71b033ab1ed7912de7.tar.xz
wireguard-openbsd-819aaafa28c6aac10fd34d71b033ab1ed7912de7.zip
Sync with NetBSD
-rw-r--r--sys/dev/ic/adv.c35
-rw-r--r--sys/dev/ic/advlib.c402
-rw-r--r--sys/dev/ic/advlib.h67
3 files changed, 327 insertions, 177 deletions
diff --git a/sys/dev/ic/adv.c b/sys/dev/ic/adv.c
index f856e88bf38..d0ff03022ef 100644
--- a/sys/dev/ic/adv.c
+++ b/sys/dev/ic/adv.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: adv.c,v 1.2 1998/09/28 01:56:56 downsj Exp $ */
-/* $NetBSD: adv.c,v 1.4 1998/09/26 16:02:56 dante Exp $ */
+/* $OpenBSD: adv.c,v 1.3 1998/11/17 04:25:21 downsj Exp $ */
+/* $NetBSD: adv.c,v 1.6 1998/10/28 20:39:45 dante Exp $ */
/*
* Generic driver for the Advanced Systems Inc. Narrow SCSI controllers
@@ -67,6 +67,9 @@
#define Debugger() panic("should call debugger here (adv.c)")
#endif /* ! DDB */
+
+/* #define ASC_DEBUG */
+
/******************************************************************************/
@@ -802,6 +805,12 @@ adv_scsi_cmd(xs)
ccb->scsiq.q1.data_cnt = 0;
}
+#ifdef ASC_DEBUG
+ printf("id = %d, lun = %d, cmd = %d, ccb = 0x%lX \n",
+ sc_link->scsipi_scsi.target,
+ sc_link->scsipi_scsi.lun, xs->cmd->opcode,
+ (unsigned long)ccb);
+#endif
s = splbio();
adv_queue_ccb(sc, ccb);
splx(s);
@@ -831,7 +840,20 @@ adv_intr(arg)
ASC_SOFTC *sc = arg;
struct scsi_xfer *xs;
+#ifdef ASC_DEBUG
+ int int_pend = FALSE;
+
+ if(ASC_IS_INT_PENDING(sc->sc_iot, sc->sc_ioh))
+ {
+ int_pend = TRUE;
+ printf("ISR - ");
+ }
+#endif
AscISR(sc);
+#ifdef ASC_DEBUG
+ if(int_pend)
+ printf("\n");
+#endif
/*
* If there are queue entries in the software queue, try to
@@ -951,6 +973,12 @@ adv_narrow_isr_callback(sc, qdonep)
struct scsi_sense_data *s1, *s2;
+#ifdef ASC_DEBUG
+ printf(" - ccb=0x%lx, id=%d, lun=%d, cmd=%d, ",
+ (unsigned long)ccb,
+ xs->sc_link->scsipi_scsi.target,
+ xs->sc_link->scsipi_scsi.lun, xs->cmd->opcode);
+#endif
untimeout(adv_timeout, ccb);
/*
@@ -971,6 +999,9 @@ adv_narrow_isr_callback(sc, qdonep)
/*
* 'qdonep' contains the command's ending status.
*/
+#ifdef ASC_DEBUG
+ printf("d_s=%d, h_s=%d", qdonep->d3.done_stat, qdonep->d3.host_stat);
+#endif
switch (qdonep->d3.done_stat) {
case ASC_QD_NO_ERROR:
switch (qdonep->d3.host_stat) {
diff --git a/sys/dev/ic/advlib.c b/sys/dev/ic/advlib.c
index 0b3d092b130..3d441aa7c0b 100644
--- a/sys/dev/ic/advlib.c
+++ b/sys/dev/ic/advlib.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: advlib.c,v 1.2 1998/09/28 01:56:57 downsj Exp $ */
-/* $NetBSD: advlib.c,v 1.4 1998/09/26 16:02:56 dante Exp $ */
+/* $OpenBSD: advlib.c,v 1.3 1998/11/17 04:25:21 downsj Exp $ */
+/* $NetBSD: advlib.c,v 1.7 1998/10/28 20:39:46 dante Exp $ */
/*
* Low level routines for the Advanced Systems Inc. SCSI controllers chips
@@ -76,6 +76,8 @@
#include <dev/ic/advmcode.h>
+/* #define ASC_DEBUG */
+
/******************************************************************************/
/* Static functions */
/******************************************************************************/
@@ -135,6 +137,8 @@ static int AscTestExternalLram __P((bus_space_tag_t, bus_space_handle_t));
/* MicroCode routines */
static u_int16_t AscInitMicroCodeVar __P((ASC_SOFTC *));
static u_int32_t AscGetOnePhyAddr __P((ASC_SOFTC *, u_int8_t *, u_int32_t));
+static u_int32_t AscGetSGList __P((ASC_SOFTC *, u_int8_t *, u_int32_t,
+ ASC_SG_HEAD *));
/* EEProm routines */
static int AscWriteEEPCmdReg __P((bus_space_tag_t, bus_space_handle_t,
@@ -153,6 +157,9 @@ static int AscSetEEPConfig __P((bus_space_tag_t, bus_space_handle_t,
ASCEEP_CONFIG *, u_int16_t));
static int AscSetEEPConfigOnce __P((bus_space_tag_t, bus_space_handle_t,
ASCEEP_CONFIG *, u_int16_t));
+#ifdef ASC_DEBUG
+static void AscPrintEEPConfig __P((ASCEEP_CONFIG *, u_int16_t));
+#endif
/* Interrupt routines */
static void AscIsrChipHalted __P((ASC_SOFTC *));
@@ -162,6 +169,8 @@ static int AscWaitISRDone __P((ASC_SOFTC *));
static u_int8_t _AscCopyLramScsiDoneQ __P((bus_space_tag_t, bus_space_handle_t,
u_int16_t, ASC_QDONE_INFO *,
u_int32_t));
+static void AscGetQDoneInfo __P((bus_space_tag_t, bus_space_handle_t, u_int16_t,
+ ASC_QDONE_INFO *));
static void AscToggleIRQAct __P((bus_space_tag_t, bus_space_handle_t));
static void AscDisableInterrupt __P((bus_space_tag_t, bus_space_handle_t));
static void AscEnableInterrupt __P((bus_space_tag_t, bus_space_handle_t));
@@ -194,6 +203,8 @@ static int AscSendScsiQueue __P((ASC_SOFTC *, ASC_SCSI_Q *, u_int8_t));
static int AscSgListToQueue __P((int));
static u_int AscGetNumOfFreeQueue __P((ASC_SOFTC *, u_int8_t, u_int8_t));
static int AscPutReadyQueue __P((ASC_SOFTC *, ASC_SCSI_Q *, u_int8_t));
+static void AscPutSCSIQ __P((bus_space_tag_t, bus_space_handle_t,
+ u_int16_t, ASC_SCSI_Q *));
static int AscPutReadySgListQueue __P((ASC_SOFTC *, ASC_SCSI_Q *, u_int8_t));
static u_int8_t AscAllocFreeQueue __P((bus_space_tag_t, bus_space_handle_t,
u_int8_t));
@@ -227,12 +238,6 @@ static void DvcLeaveCritical __P((int));
static void DvcSleepMilliSecond __P((u_int32_t));
//static void DvcDelayMicroSecond __P((u_int32_t));
static void DvcDelayNanoSecond __P((u_int32_t));
-static u_int32_t DvcGetSGList __P((ASC_SOFTC *, u_int8_t *, u_int32_t,
- ASC_SG_HEAD *));
-static void DvcPutScsiQ __P((bus_space_tag_t, bus_space_handle_t,
- u_int16_t, u_int16_t *, int));
-static void DvcGetQinfo __P((bus_space_tag_t, bus_space_handle_t,
- u_int16_t, u_int16_t *, int words));
/******************************************************************************/
@@ -375,7 +380,7 @@ AscInitFromEEP(sc)
if (ASC_GET_PC_ADDR(iot, ioh) != ASC_MCODE_START_ADDR)
return (-2);
- eep_config = (ASCEEP_CONFIG *) & eep_config_buf;
+ eep_config = &eep_config_buf;
cfg_msw = ASC_GET_CHIP_CFG_MSW(iot, ioh);
cfg_lsw = ASC_GET_CHIP_CFG_LSW(iot, ioh);
if ((cfg_msw & ASC_CFG_MSW_CLR_MASK) != 0) {
@@ -384,6 +389,9 @@ AscInitFromEEP(sc)
ASC_SET_CHIP_CFG_MSW(iot, ioh, cfg_msw);
}
chksum = AscGetEEPConfig(iot, ioh, eep_config, sc->bus_type);
+#ifdef ASC_DEBUG
+ AscPrintEEPConfig(eep_config, chksum);
+#endif
if (chksum == 0)
chksum = 0xAA55;
@@ -419,9 +427,15 @@ AscInitFromEEP(sc)
eep_config->adapter_info[1] = 0;
eep_config->adapter_info[2] = 0;
eep_config->adapter_info[3] = 0;
+#if BYTE_ORDER == BIG_ENDIAN
+ eep_config->adapter_info[5] = 0;
+ /* Indicate EEPROM-less board. */
+ eep_config->adapter_info[4] = 0xBB;
+#else
eep_config->adapter_info[4] = 0;
/* Indicate EEPROM-less board. */
eep_config->adapter_info[5] = 0xBB;
+#endif
} else {
write_eep = 1;
warn_code |= ASC_WARN_EEPROM_CHKSUM;
@@ -433,12 +447,21 @@ AscInitFromEEP(sc)
sc->isa_dma_speed = eep_config->isa_dma_speed;
sc->start_motor = eep_config->start_motor;
sc->dvc_cntl = eep_config->cntl;
+#if BYTE_ORDER == BIG_ENDIAN
+ sc->adapter_info[0] = eep_config->adapter_info[1];
+ sc->adapter_info[1] = eep_config->adapter_info[0];
+ sc->adapter_info[2] = eep_config->adapter_info[3];
+ sc->adapter_info[3] = eep_config->adapter_info[2];
+ sc->adapter_info[4] = eep_config->adapter_info[5];
+ sc->adapter_info[5] = eep_config->adapter_info[4];
+#else
sc->adapter_info[0] = eep_config->adapter_info[0];
sc->adapter_info[1] = eep_config->adapter_info[1];
sc->adapter_info[2] = eep_config->adapter_info[2];
sc->adapter_info[3] = eep_config->adapter_info[3];
sc->adapter_info[4] = eep_config->adapter_info[4];
sc->adapter_info[5] = eep_config->adapter_info[5];
+#endif
if (!AscTestExternalLram(iot, ioh)) {
if (((sc->bus_type & ASC_IS_PCI_ULTRA) == ASC_IS_PCI_ULTRA)) {
@@ -486,8 +509,12 @@ AscInitFromEEP(sc)
}
eep_config->cfg_msw = ASC_GET_CHIP_CFG_MSW(iot, ioh);
- if (write_eep)
+ if (write_eep) {
AscSetEEPConfig(iot, ioh, eep_config, sc->bus_type);
+#ifdef ASC_DEBUG
+ AscPrintEEPConfig(eep_config, 0);
+#endif
+ }
return (warn_code);
}
@@ -601,33 +628,6 @@ AscFindSignature(iot, ioh)
}
-static u_int32_t
-AscLoadMicroCode(iot, ioh, s_addr, mcode_buf, mcode_size)
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- u_int16_t s_addr;
- u_int16_t *mcode_buf;
- u_int16_t mcode_size;
-{
- u_int32_t chksum;
- u_int16_t mcode_word_size;
- u_int16_t mcode_chksum;
-
- mcode_word_size = mcode_size >> 1;
- /* clear board memory */
- AscMemWordSetLram(iot, ioh, s_addr, 0, mcode_word_size);
- /* copy uCode to board memory */
- AscMemWordCopyToLram(iot, ioh, s_addr, mcode_buf, mcode_word_size);
- chksum = AscMemSumLramWord(iot, ioh, s_addr, mcode_word_size);
- mcode_chksum = AscMemSumLramWord(iot, ioh, ASC_CODE_SEC_BEG,
- ((mcode_size - s_addr - ASC_CODE_SEC_BEG) >> 1));
- AscWriteLramWord(iot, ioh, ASCV_MCODE_CHKSUM_W, mcode_chksum);
- AscWriteLramWord(iot, ioh, ASCV_MCODE_SIZE_W, mcode_size);
-
- return (chksum);
-}
-
-
static void
AscInitLram(sc)
ASC_SOFTC *sc;
@@ -1012,19 +1012,15 @@ AscReadLramByte(iot, ioh, addr)
ASC_SET_CHIP_LRAM_ADDR(iot, ioh, addr & 0xFFFE);
word_data = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
-#if BYTE_ORDER == BIG_ENDIAN
- if (addr & 1)
- //odd address
- byte_data = (u_int8_t) (word_data & 0xFF);
- else
+
+ if (addr & 1) {
+ /* odd address */
byte_data = (u_int8_t) ((word_data >> 8) & 0xFF);
-#else
- if (addr & 1)
- //odd address
- byte_data = (u_int8_t) ((word_data >> 8) & 0xFF);
- else
+ } else {
+ /* even address */
byte_data = (u_int8_t) (word_data & 0xFF);
-#endif
+ }
+
return (byte_data);
}
@@ -1040,27 +1036,17 @@ AscWriteLramByte(iot, ioh, addr, data)
word_data = AscReadLramWord(iot, ioh, addr & 0xFFFE);
-#if BYTE_ORDER == BIG_ENDIAN
- if (addr & 1)
- //odd address
- {
- word_data &= 0xFF00;
- word_data |= ((u_int16_t) data) & 0x00FF;
- } else {
- word_data &= 0xFF00;
- word_data |= (((u_int16_t) data) << 8) & 0xFF00;
- }
-#else
- if (addr & 1)
- //odd address
- {
+
+ if (addr & 1) {
+ /* odd address */
word_data &= 0x00FF;
word_data |= (((u_int16_t) data) << 8) & 0xFF00;
} else {
+ /* even address */
word_data &= 0xFF00;
word_data |= ((u_int16_t) data) & 0x00FF;
}
-#endif
+
AscWriteLramWord(iot, ioh, addr, word_data);
}
@@ -1149,7 +1135,7 @@ AscMemWordCopyToLram(iot, ioh, s_addr, s_buffer, words)
ASC_SET_CHIP_LRAM_ADDR(iot, ioh, s_addr);
for (i = 0; i < words; i++, s_buffer++)
- ASC_SET_CHIP_LRAM_DATA(iot, ioh, *s_buffer);
+ ASC_SET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh, *s_buffer);
}
@@ -1165,7 +1151,7 @@ AscMemWordCopyFromLram(iot, ioh, s_addr, s_buffer, words)
ASC_SET_CHIP_LRAM_ADDR(iot, ioh, s_addr);
for (i = 0; i < words; i++, s_buffer++)
- *s_buffer = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
+ *s_buffer = ASC_GET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh);
}
@@ -1178,15 +1164,16 @@ AscMemDWordCopyToLram(iot, ioh, s_addr, s_buffer, dwords)
int dwords;
{
int i;
- int words;
- u_int16_t *pw;
+ u_int32_t *pw;
ASC_SET_CHIP_LRAM_ADDR(iot, ioh, s_addr);
- pw = (u_int16_t *) s_buffer;
- words = dwords << 1;
- for (i = 0; i < words; i++, pw++)
- ASC_SET_CHIP_LRAM_DATA(iot, ioh, *pw);
+ pw = s_buffer;
+ for (i = 0; i < dwords; i++, pw++) {
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, LO_WORD(*pw));
+ DELAY(1);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, HI_WORD(*pw));
+ }
}
@@ -1283,6 +1270,33 @@ AscInitMicroCodeVar(sc)
static u_int32_t
+AscLoadMicroCode(iot, ioh, s_addr, mcode_buf, mcode_size)
+ bus_space_tag_t iot;
+ bus_space_handle_t ioh;
+ u_int16_t s_addr;
+ u_int16_t *mcode_buf;
+ u_int16_t mcode_size;
+{
+ u_int32_t chksum;
+ u_int16_t mcode_word_size;
+ u_int16_t mcode_chksum;
+
+ mcode_word_size = mcode_size >> 1;
+ /* clear board memory */
+ AscMemWordSetLram(iot, ioh, s_addr, 0, mcode_word_size);
+ /* copy uCode to board memory */
+ AscMemWordCopyToLram(iot, ioh, s_addr, mcode_buf, mcode_word_size);
+ chksum = AscMemSumLramWord(iot, ioh, s_addr, mcode_word_size);
+ mcode_chksum = AscMemSumLramWord(iot, ioh, ASC_CODE_SEC_BEG,
+ ((mcode_size - s_addr - ASC_CODE_SEC_BEG) >> 1));
+ AscWriteLramWord(iot, ioh, ASCV_MCODE_CHKSUM_W, mcode_chksum);
+ AscWriteLramWord(iot, ioh, ASCV_MCODE_SIZE_W, mcode_size);
+
+ return (chksum);
+}
+
+
+static u_int32_t
AscGetOnePhyAddr(sc, buf_addr, buf_size)
ASC_SOFTC *sc;
u_int8_t *buf_addr;
@@ -1291,7 +1305,7 @@ AscGetOnePhyAddr(sc, buf_addr, buf_size)
ASC_MIN_SG_HEAD sg_head;
sg_head.entry_cnt = ASC_MIN_SG_LIST;
- if (DvcGetSGList(sc, buf_addr, buf_size, (ASC_SG_HEAD *) & sg_head) !=
+ if (AscGetSGList(sc, buf_addr, buf_size, (ASC_SG_HEAD *) & sg_head) !=
buf_size) {
return (0L);
}
@@ -1300,6 +1314,26 @@ AscGetOnePhyAddr(sc, buf_addr, buf_size)
}
return (sg_head.sg_list[0].addr);
}
+
+
+static u_int32_t
+AscGetSGList(sc, buf_addr, buf_len, asc_sg_head_ptr)
+ ASC_SOFTC *sc;
+ u_int8_t *buf_addr;
+ u_int32_t buf_len;
+ ASC_SG_HEAD *asc_sg_head_ptr;
+{
+ u_int32_t buf_size;
+
+ buf_size = buf_len;
+ asc_sg_head_ptr->entry_cnt = 1;
+ asc_sg_head_ptr->sg_list[0].addr = (u_int32_t) buf_addr;
+ asc_sg_head_ptr->sg_list[0].bytes = buf_size;
+
+ return (buf_size);
+}
+
+
/******************************************************************************/
/* EEProm routines */
/******************************************************************************/
@@ -1526,18 +1560,63 @@ AscSetEEPConfigOnce(iot, ioh, cfg_buf, bus_type)
n_error++;
wbuf = (u_int16_t *) cfg_buf;
- for (s_addr = 0; s_addr < 2; s_addr++, wbuf++)
+ for (s_addr = 0; s_addr < 2; s_addr++, wbuf++) {
if (*wbuf != AscReadEEPWord(iot, ioh, s_addr))
n_error++;
+ }
- for (s_addr = cfg_beg; s_addr <= cfg_end; s_addr++, wbuf++)
+ for (s_addr = cfg_beg; s_addr <= cfg_end; s_addr++, wbuf++) {
if (*wbuf != AscReadEEPWord(iot, ioh, s_addr))
n_error++;
+ }
return (n_error);
}
+#ifdef ASC_DEBUG
+static void
+AscPrintEEPConfig(eep_config, chksum)
+ ASCEEP_CONFIG *eep_config;
+ u_int16_t chksum;
+{
+ printf("---- ASC EEprom settings ----\n");
+ printf("cfg_lsw = 0x%x\n", eep_config->cfg_lsw);
+ printf("cfg_msw = 0x%x\n", eep_config->cfg_msw);
+ printf("init_sdtr = 0x%x\n", eep_config->init_sdtr);
+ printf("disc_enable = 0x%x\n", eep_config->disc_enable);
+ printf("use_cmd_qng = %d\n", eep_config->use_cmd_qng);
+ printf("start_motor = 0x%x\n", eep_config->start_motor);
+ printf("max_total_qng = 0x%x\n", eep_config->max_total_qng);
+ printf("max_tag_qng = 0x%x\n", eep_config->max_tag_qng);
+ printf("bios_scan = 0x%x\n", eep_config->bios_scan);
+ printf("power_up_wait = 0x%x\n", eep_config->power_up_wait);
+ printf("no_scam = %d\n", eep_config->no_scam);
+ printf("chip_scsi_id = %d\n", eep_config->chip_scsi_id);
+ printf("isa_dma_speed = %d\n", eep_config->isa_dma_speed);
+ printf("cntl = 0x%x\n", eep_config->cntl);
+#if BYTE_ORDER == BIG_ENDIAN
+ printf("adapter_info[0] = 0x%x\n", eep_config->adapter_info[1]);
+ printf("adapter_info[1] = 0x%x\n", eep_config->adapter_info[0]);
+ printf("adapter_info[2] = 0x%x\n", eep_config->adapter_info[3]);
+ printf("adapter_info[3] = 0x%x\n", eep_config->adapter_info[2]);
+ printf("adapter_info[4] = 0x%x\n", eep_config->adapter_info[5]);
+ printf("adapter_info[5] = 0x%x\n", eep_config->adapter_info[4]);
+#else
+ printf("adapter_info[0] = 0x%x\n", eep_config->adapter_info[0]);
+ printf("adapter_info[1] = 0x%x\n", eep_config->adapter_info[1]);
+ printf("adapter_info[2] = 0x%x\n", eep_config->adapter_info[2]);
+ printf("adapter_info[3] = 0x%x\n", eep_config->adapter_info[3]);
+ printf("adapter_info[4] = 0x%x\n", eep_config->adapter_info[4]);
+ printf("adapter_info[5] = 0x%x\n", eep_config->adapter_info[5]);
+#endif
+ printf("checksum = 0x%x\n", eep_config->chksum);
+ printf("calculated checksum = 0x%x\n", chksum);
+ printf("-----------------------------\n");
+}
+#endif
+
+
/******************************************************************************/
/* Interrupt routines */
/******************************************************************************/
@@ -1564,7 +1643,7 @@ AscISR(sc)
saved_ctrl_reg = ctrl_reg & (~(ASC_CC_SCSI_RESET | ASC_CC_CHIP_RESET |
ASC_CC_SINGLE_STEP | ASC_CC_DIAG | ASC_CC_TEST));
chipstat = ASC_GET_CHIP_STATUS(iot, ioh);
- if (chipstat & ASC_CSW_SCSI_RESET_LATCH)
+ if (chipstat & ASC_CSW_SCSI_RESET_LATCH) {
if (!(sc->bus_type & (ASC_IS_VL | ASC_IS_EISA))) {
int_pending = TRUE;
sc->sdtr_done = 0;
@@ -1578,6 +1657,7 @@ AscISR(sc)
ASC_SET_CHIP_STATUS(iot, ioh, 0);
chipstat = ASC_GET_CHIP_STATUS(iot, ioh);
}
+ }
saved_ram_addr = ASC_GET_CHIP_LRAM_ADDR(iot, ioh);
host_flag = AscReadLramByte(iot, ioh, ASCV_HOST_FLAG_B) &
(u_int8_t) (~ASC_HOST_FLAG_IN_ISR);
@@ -1686,8 +1766,9 @@ AscIsrQDone(sc)
}
if (sc->cur_total_qng >= n_q_used) {
sc->cur_total_qng -= n_q_used;
- if (sc->cur_dvc_qng[tid_no] != 0)
+ if (sc->cur_dvc_qng[tid_no] != 0) {
sc->cur_dvc_qng[tid_no]--;
+ }
} else {
AscSetLibErrorCode(sc, ASCQ_ERR_CUR_QNG);
scsiq->d3.done_stat = ASC_QD_WITH_ERROR;
@@ -1765,10 +1846,11 @@ AscIsrChipHalted(sc)
tid_no = ASC_TIX_TO_TID(target_ix);
target_id = ASC_TID_TO_TARGET_ID(tid_no);
- if (sc->pci_fix_asyn_xfer & target_id)
+ if (sc->pci_fix_asyn_xfer & target_id) {
asyn_sdtr = ASYN_SDTR_DATA_FIX_PCI_REV_AB;
- else
+ } else {
asyn_sdtr = 0;
+ }
if (int_halt_code == ASC_HALT_DISABLE_ASYN_USE_SYN_FIX) {
if (sc->pci_fix_asyn_xfer & target_id) {
@@ -1827,7 +1909,6 @@ AscIsrChipHalted(sc)
if ((out_msg.msg_type == MS_EXTEND) &&
(out_msg.msg_len == MS_SDTR_LEN) &&
(out_msg.msg_req == MS_SDTR_CODE)) {
-
sc->init_sdtr &= ~target_id;
sc->sdtr_done &= ~target_id;
AscSetChipSDTR(iot, ioh, asyn_sdtr, tid_no);
@@ -1915,17 +1996,17 @@ _AscCopyLramScsiDoneQ(iot, ioh, q_addr, scsiq, max_dma_count)
u_int16_t _val;
u_int8_t sg_queue_cnt;
- DvcGetQinfo(iot, ioh, q_addr + ASC_SCSIQ_DONE_INFO_BEG, (u_int16_t *) scsiq,
- ((sizeof(ASC_SCSIQ_2) + sizeof(ASC_SCSIQ_3)) / 2));
+ AscGetQDoneInfo(iot, ioh, q_addr + ASC_SCSIQ_DONE_INFO_BEG, scsiq);
+
_val = AscReadLramWord(iot, ioh, q_addr + ASC_SCSIQ_B_STATUS);
- scsiq->q_status = _val;
- scsiq->q_no = (_val >> 8);
+ scsiq->q_status = LO_BYTE(_val);
+ scsiq->q_no = HI_BYTE(_val);
_val = AscReadLramWord(iot, ioh, q_addr + ASC_SCSIQ_B_CNTL);
- scsiq->cntl = _val;
- sg_queue_cnt = (_val >> 8);
+ scsiq->cntl = LO_BYTE(_val);
+ sg_queue_cnt = HI_BYTE(_val);
_val = AscReadLramWord(iot, ioh, q_addr + ASC_SCSIQ_B_SENSE_LEN);
- scsiq->sense_len = _val;
- scsiq->extra_bytes = (_val >> 8);
+ scsiq->sense_len = LO_BYTE(_val);
+ scsiq->extra_bytes = HI_BYTE(_val);
scsiq->remain_bytes = AscReadLramWord(iot, ioh,
q_addr + ASC_SCSIQ_DW_REMAIN_XFER_CNT);
scsiq->remain_bytes &= max_dma_count;
@@ -1935,6 +2016,36 @@ _AscCopyLramScsiDoneQ(iot, ioh, q_addr, scsiq, max_dma_count)
static void
+AscGetQDoneInfo(iot, ioh, addr, scsiq)
+ bus_space_tag_t iot;
+ bus_space_handle_t ioh;
+ u_int16_t addr;
+ ASC_QDONE_INFO *scsiq;
+{
+ u_int16_t val;
+
+ ASC_SET_CHIP_LRAM_ADDR(iot, ioh, addr);
+
+ val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
+ scsiq->d2.ccb_ptr = MAKELONG(val, ASC_GET_CHIP_LRAM_DATA(iot, ioh));
+ val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
+ scsiq->d2.target_ix = LO_BYTE(val);
+ scsiq->d2.flag = HI_BYTE(val);
+ val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
+ scsiq->d2.cdb_len = LO_BYTE(val);
+ scsiq->d2.tag_code = HI_BYTE(val);
+ scsiq->d2.vm_id = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
+
+ val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
+ scsiq->d3.done_stat = LO_BYTE(val);
+ scsiq->d3.host_stat = HI_BYTE(val);
+ val = ASC_GET_CHIP_LRAM_DATA(iot, ioh);
+ scsiq->d3.scsi_stat = LO_BYTE(val);
+ scsiq->d3.scsi_msg = HI_BYTE(val);
+}
+
+
+static void
AscToggleIRQAct(iot, ioh)
bus_space_tag_t iot;
bus_space_handle_t ioh;
@@ -2615,12 +2726,14 @@ AscPutReadySgListQueue(sc, scsiq, q_no)
* Tell the board how many entries are in the S/G list
*/
AscMemWordCopyToLram(iot, ioh, q_addr + ASC_SCSIQ_SGHD_CPY_BEG,
- (u_int16_t *) & scsi_sg_q, sizeof(ASC_SG_LIST_Q) >> 1);
+ (u_int16_t *) & scsi_sg_q,
+ sizeof(ASC_SG_LIST_Q) >> 1);
/*
* Tell the board the addresses of the S/G list segments
*/
AscMemDWordCopyToLram(iot, ioh, q_addr + ASC_SGQ_LIST_BEG,
- (u_int32_t *) & sg_head->sg_list[sg_index], sg_list_dwords);
+ (u_int32_t *) & sg_head->sg_list[sg_index],
+ sg_list_dwords);
sg_index += ASC_SG_LIST_PER_Q;
}
}
@@ -2665,9 +2778,7 @@ AscPutReadyQueue(sc, scsiq, q_no)
AscMemWordCopyToLram(iot, ioh, q_addr + ASC_SCSIQ_CDB_BEG,
(u_int16_t *) scsiq->cdbptr, scsiq->q2.cdb_len >> 1);
- DvcPutScsiQ(iot, ioh, q_addr + ASC_SCSIQ_CPY_BEG,
- (u_int16_t *) & scsiq->q1.cntl,
- ((sizeof(ASC_SCSIQ_1) + sizeof(ASC_SCSIQ_2)) / 2) - 1);
+ AscPutSCSIQ(iot, ioh, q_addr + ASC_SCSIQ_CPY_BEG, scsiq);
/*
* Let's start the command
@@ -2679,6 +2790,51 @@ AscPutReadyQueue(sc, scsiq, q_no)
}
+static void
+AscPutSCSIQ(iot, ioh, addr, scsiq)
+ bus_space_tag_t iot;
+ bus_space_handle_t ioh;
+ u_int16_t addr;
+ ASC_SCSI_Q *scsiq;
+{
+ u_int16_t val;
+
+
+ ASC_SET_CHIP_LRAM_ADDR(iot, ioh, addr);
+
+ /* ASC_SCSIQ_1 */
+ val = MAKEWORD(scsiq->q1.cntl, scsiq->q1.sg_queue_cnt);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = MAKEWORD(scsiq->q1.target_id, scsiq->q1.target_lun);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = LO_WORD(scsiq->q1.data_addr);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = HI_WORD(scsiq->q1.data_addr);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = LO_WORD(scsiq->q1.data_cnt);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = HI_WORD(scsiq->q1.data_cnt);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = LO_WORD(scsiq->q1.sense_addr);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = HI_WORD(scsiq->q1.sense_addr);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = MAKEWORD(scsiq->q1.sense_len, scsiq->q1.extra_bytes);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+
+ /* ASC_SCSIQ_2 */
+ val = LO_WORD(scsiq->q2.ccb_ptr);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = HI_WORD(scsiq->q2.ccb_ptr);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = MAKEWORD(scsiq->q2.target_ix, scsiq->q2.flag);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ val = MAKEWORD(scsiq->q2.cdb_len, scsiq->q2.tag_code);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, val);
+ ASC_SET_CHIP_LRAM_DATA(iot, ioh, scsiq->q2.vm_id);
+}
+
+
static int
AscSgListToQueue(sg_list)
int sg_list;
@@ -3044,7 +3200,7 @@ AscResetDevice(sc, target_ix)
AscStartQueueExe(iot, ioh);
if (sc->pci_fix_asyn_xfer & target_id)
AscSetRunChipSynRegAtID(iot, ioh, tid_no,
- ASYN_SDTR_DATA_FIX_PCI_REV_AB);
+ ASYN_SDTR_DATA_FIX_PCI_REV_AB);
AscWaitTixISRDone(sc, target_ix);
}
} else
@@ -3111,7 +3267,7 @@ AscSetLibErrorCode(sc, err_code)
{
/*
* if(sc->err_code == 0) { sc->err_code = err_code;
- */ AscWriteLramWord(sc->sc_iot, sc->sc_ioh, ASCV_ASCDVC_ERR_CODE_W,
+ */ AscWriteLramWord(sc->sc_iot, sc->sc_ioh, ASCV_ASCDVC_ERR_CODE_W,
err_code);
/*
* }
@@ -3310,61 +3466,3 @@ DvcDelayNanoSecond(n)
DELAY((n + 999) / 1000);
}
-
-
-static u_int32_t
-DvcGetSGList(sc, buf_addr, buf_len, asc_sg_head_ptr)
- ASC_SOFTC *sc;
- u_int8_t *buf_addr;
- u_int32_t buf_len;
- ASC_SG_HEAD *asc_sg_head_ptr;
-{
- u_int32_t buf_size;
-
- buf_size = buf_len;
- asc_sg_head_ptr->entry_cnt = 1;
- asc_sg_head_ptr->sg_list[0].addr = (u_int32_t) buf_addr;
- asc_sg_head_ptr->sg_list[0].bytes = buf_size;
-
- return (buf_size);
-}
-
-
-static void
-DvcPutScsiQ(iot, ioh, s_addr, outbuf, words)
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- u_int16_t s_addr;
- u_int16_t *outbuf;
- int words;
-{
- int i;
-
- ASC_SET_CHIP_LRAM_ADDR(iot, ioh, s_addr);
- for (i = 0; i < words; i++, outbuf++) {
- if (i == 2 || i == 10)
- continue;
-
- ASC_SET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh, *outbuf);
- }
-}
-
-
-static void
-DvcGetQinfo(iot, ioh, s_addr, inbuf, words)
- bus_space_tag_t iot;
- bus_space_handle_t ioh;
- u_int16_t s_addr;
- u_int16_t *inbuf;
- int words;
-{
- int i;
-
- ASC_SET_CHIP_LRAM_ADDR(iot, ioh, s_addr);
- for (i = 0; i < words; i++, inbuf++) {
- if (i == 5)
- continue;
-
- *inbuf = ASC_GET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh);
- }
-}
diff --git a/sys/dev/ic/advlib.h b/sys/dev/ic/advlib.h
index 6d3bcec6bc6..3e8942cfbf1 100644
--- a/sys/dev/ic/advlib.h
+++ b/sys/dev/ic/advlib.h
@@ -1,5 +1,5 @@
-/* $OpenBSD: advlib.h,v 1.2 1998/09/28 01:56:57 downsj Exp $ */
-/* $NetBSD: advlib.h,v 1.3 1998/09/26 16:02:57 dante Exp $ */
+/* $OpenBSD: advlib.h,v 1.3 1998/11/17 04:25:21 downsj Exp $ */
+/* $NetBSD: advlib.h,v 1.5 1998/10/28 20:39:46 dante Exp $ */
/*
* Definitions for low level routines and data structures
@@ -72,37 +72,44 @@
#define ASC_ERROR -1
-#define HI_BYTE(x) (*((__u8 *)(&x)+1))
-#define LO_BYTE(x) (*((__u8 *)&x))
-#define HI_WORD(x) (*((__u16 *)(&x)+1))
-#define LO_WORD(x) (*((__u16 *)&x))
-#ifndef MAKEWORD
-#define MAKEWORD(lo, hi) ((__u16) (((__u16) lo) | ((__u16) hi << 8)))
-#endif
-#ifndef MAKELONG
-#define MAKELONG(lo, hi) ((__u32) (((__u32) lo) | ((__u32) hi << 16)))
+#if BYTE_ORDER == BIG_ENDIAN
+#define LO_BYTE(x) (*((u_int8_t *)(&(x))+1))
+#define HI_BYTE(x) (*((u_int8_t *)&(x)))
+#define LO_WORD(x) (*((u_int16_t *)(&(x))+1))
+#define HI_WORD(x) (*((u_int16_t *)&(x)))
+#else
+#define HI_BYTE(x) (*((u_int8_t *)(&(x))+1))
+#define LO_BYTE(x) (*((u_int8_t *)&(x)))
+#define HI_WORD(x) (*((u_int16_t *)(&(x))+1))
+#define LO_WORD(x) (*((u_int16_t *)&(x)))
#endif
-#define SwapWords(dWord) ((__u32) ((dWord >> 16) | (dWord << 16)))
-#define SwapBytes(word) ((__u16) ((word >> 8) | (word << 8)))
-#define BigToLittle(dWord) ((__u32) (SwapWords(MAKELONG(SwapBytes(LO_WORD(dWord)), SwapBytes(HI_WORD(dWord))))))
-#define LittleToBig(dWord) BigToLittle(dWord)
+
+#define MAKEWORD(lo, hi) ((u_int16_t) (((u_int16_t) (lo)) | \
+ ((u_int16_t) (hi) << 8)))
+
+#define MAKELONG(lo, hi) ((u_int32_t) (((u_int32_t) (lo)) | \
+ ((u_int32_t) (hi) << 16)))
+
+#define SWAPWORDS(dWord) ((u_int32_t) ((dWord) >> 16) | ((dWord) << 16))
+#define SWAPBYTES(word) ((u_int16_t) ((word) >> 8) | ((word) << 8))
+#define BIGTOLITTLE(dWord) (u_int32_t)(SWAPBYTES(SWAPWORDS(dWord) >> 16 ) << 16) | \
+ SWAPBYTES(SWAPWORDS(dWord) & 0xFFFF)
+#define LITTLETOBIG(dWord) BIGTOLITTLE(dWord)
#define ASC_PCI_ID2BUS(id) ((id) & 0xFF)
#define ASC_PCI_ID2DEV(id) (((id) >> 11) & 0x1F)
#define ASC_PCI_ID2FUNC(id) (((id) >> 8) & 0x7)
-#define ASC_PCI_MKID(bus, dev, func) ((((dev) & 0x1F) << 11) | (((func) & 0x7) << 8) | ((bus) & 0xFF))
+#define ASC_PCI_MKID(bus, dev, func) ((((dev) & 0x1F) << 11) | \
+ (((func) & 0x7) << 8) | ((bus) & 0xFF))
#define ASC_PCI_REVISION_3150 0x02
#define ASC_PCI_REVISION_3050 0x03
-#define ASC_IS_NARROW_BOARD(sc) (((sc)->sc_flags & ASC_WIDE_BOARD) == 0)
-#define ASC_IS_WIDE_BOARD(sc) ((sc)->sc_flags & ASC_WIDE_BOARD)
-
-
#define ASC_MAX_SG_QUEUE 7
#define ASC_SG_LIST_PER_Q ASC_MAX_SG_QUEUE
-#define ASC_MAX_SG_LIST (1 + ((ASC_SG_LIST_PER_Q) * (ASC_MAX_SG_QUEUE))) /* SG_ALL */
+#define ASC_MAX_SG_LIST (1 + ((ASC_SG_LIST_PER_Q) * \
+ (ASC_MAX_SG_QUEUE))) /* SG_ALL */
#define ASC_IS_ISA 0x0001
@@ -969,6 +976,19 @@ typedef struct asceep_config
{
u_int16_t cfg_lsw;
u_int16_t cfg_msw;
+#if BYTE_ORDER == BIG_ENDIAN
+ u_int8_t disc_enable;
+ u_int8_t init_sdtr;
+ u_int8_t start_motor;
+ u_int8_t use_cmd_qng;
+ u_int8_t max_tag_qng;
+ u_int8_t max_total_qng;
+ u_int8_t power_up_wait;
+ u_int8_t bios_scan;
+ u_int8_t isa_dma_speed:4;
+ u_int8_t chip_scsi_id:4;
+ u_int8_t no_scam;
+#else
u_int8_t init_sdtr;
u_int8_t disc_enable;
u_int8_t use_cmd_qng;
@@ -980,6 +1000,7 @@ typedef struct asceep_config
u_int8_t no_scam;
u_int8_t chip_scsi_id:4;
u_int8_t isa_dma_speed:4;
+#endif
u_int8_t dos_int13_table[ASC_MAX_TID + 1];
u_int8_t adapter_info[6];
u_int16_t cntl;
@@ -1249,8 +1270,8 @@ typedef struct asceep_config
#define ASC_GET_CHIP_LRAM_DATA(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_RAM_DATA)
#define ASC_SET_CHIP_LRAM_DATA(iot, ioh, data) bus_space_write_2((iot), (ioh), ASC_IOP_RAM_DATA, data)
#if BYTE_ORDER == BIG_ENDIAN
-#define ASC_GET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh) swap_bytes(bus_space_read_2((iot), (ioh), ASC_IOP_RAM_DATA))
-#define ASC_SET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh, data) bus_space_write_2((iot), (ioh), ASC_IOP_RAM_DATA, swap_bytes(data))
+#define ASC_GET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh) SWAPBYTES(bus_space_read_2((iot), (ioh), ASC_IOP_RAM_DATA))
+#define ASC_SET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh, data) bus_space_write_2((iot), (ioh), ASC_IOP_RAM_DATA, SWAPBYTES(data))
#else
#define ASC_GET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh) bus_space_read_2((iot), (ioh), ASC_IOP_RAM_DATA)
#define ASC_SET_CHIP_LRAM_DATA_NO_SWAP(iot, ioh, data) bus_space_write_2((iot), (ioh), ASC_IOP_RAM_DATA, data)