summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorjsg <jsg@openbsd.org>2020-05-27 05:02:21 +0000
committerjsg <jsg@openbsd.org>2020-05-27 05:02:21 +0000
commit9914efbf395e5d2d4059aa7ec3dba9e5e70bfaa3 (patch)
tree302a935409cbad513e4d19e8b7a424235ee2e9dc
parentadd support for pcap_breakloop when reading packets from files. (diff)
downloadwireguard-openbsd-9914efbf395e5d2d4059aa7ec3dba9e5e70bfaa3.tar.xz
wireguard-openbsd-9914efbf395e5d2d4059aa7ec3dba9e5e70bfaa3.zip
limit clflush before monitor errata workaround to Intel
no functional change as clflush is currently only done on Intel
-rw-r--r--sys/dev/acpi/acpicpu.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/sys/dev/acpi/acpicpu.c b/sys/dev/acpi/acpicpu.c
index d61547ce535..ba806663a06 100644
--- a/sys/dev/acpi/acpicpu.c
+++ b/sys/dev/acpi/acpicpu.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: acpicpu.c,v 1.84 2019/10/16 01:27:59 mlarkin Exp $ */
+/* $OpenBSD: acpicpu.c,v 1.85 2020/05/27 05:02:21 jsg Exp $ */
/*
* Copyright (c) 2005 Marco Peereboom <marco@openbsd.org>
* Copyright (c) 2015 Philip Guenther <guenther@openbsd.org>
@@ -1224,7 +1224,8 @@ acpicpu_idle(void)
atomic_setbits_int(&ci->ci_mwait, MWAIT_IDLING);
if (cpu_is_idle(ci)) {
/* intel errata AAI65: cflush before monitor */
- if (ci->ci_cflushsz != 0) {
+ if (ci->ci_cflushsz != 0 &&
+ strcmp(cpu_vendor, "GenuineIntel") == 0) {
membar_sync();
clflush((unsigned long)&ci->ci_mwait);
membar_sync();