diff options
| author |   mikeb <mikeb@openbsd.org> | 2012-11-26 19:03:59 +0000 |
|---|---|---|
| committer | mikeb <mikeb@openbsd.org> | 2012-11-26 19:03:59 +0000 |
| commit | a8db278540da0e870e1462f43c78042906a6eea4 (patch) | |
| tree | d2a88c5febb9e0ddcb533cd5082d5baf8693baab | |
| parent | get rid of some useless bitfields in oce_mbx and mbx_hdr (diff) | |
| download | wireguard-openbsd-a8db278540da0e870e1462f43c78042906a6eea4.tar.xz wireguard-openbsd-a8db278540da0e870e1462f43c78042906a6eea4.zip | |
shorten MBX_RX_IFACE_* defines
| -rw-r--r-- | sys/dev/pci/if_oce.c | 19 | ||||
| -rw-r--r-- | sys/dev/pci/if_ocereg.h | 38 |
2 files changed, 28 insertions, 29 deletions
diff --git a/sys/dev/pci/if_oce.c b/sys/dev/pci/if_oce.c index 1df506e0f8e..c8e7e72522b 100644 --- a/sys/dev/pci/if_oce.c +++ b/sys/dev/pci/if_oce.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_oce.c,v 1.65 2012/11/26 18:58:11 mikeb Exp $ */ +/* $OpenBSD: if_oce.c,v 1.66 2012/11/26 19:03:59 mikeb Exp $ */ /* * Copyright (c) 2012 Mike Belopuhov @@ -2953,22 +2953,22 @@ oce_create_iface(struct oce_softc *sc, uint8_t *macaddr) int err = 0; /* interface capabilities to give device when creating interface */ - caps = MBX_RX_IFACE_FLAGS_BROADCAST | MBX_RX_IFACE_FLAGS_UNTAGGED | - MBX_RX_IFACE_FLAGS_PROMISC | MBX_RX_IFACE_FLAGS_MCAST_PROMISC | - MBX_RX_IFACE_FLAGS_RSS; + caps = MBX_RX_IFACE_BROADCAST | MBX_RX_IFACE_UNTAGGED | + MBX_RX_IFACE_PROMISC | MBX_RX_IFACE_MCAST_PROMISC | + MBX_RX_IFACE_RSS; /* capabilities to enable by default (others set dynamically) */ - caps_en = MBX_RX_IFACE_FLAGS_BROADCAST | MBX_RX_IFACE_FLAGS_UNTAGGED; + caps_en = MBX_RX_IFACE_BROADCAST | MBX_RX_IFACE_UNTAGGED; if (!IS_XE201(sc)) { /* LANCER A0 workaround */ - caps |= MBX_RX_IFACE_FLAGS_PASS_L3L4_ERR; - caps_en |= MBX_RX_IFACE_FLAGS_PASS_L3L4_ERR; + caps |= MBX_RX_IFACE_PASS_L3L4_ERR; + caps_en |= MBX_RX_IFACE_PASS_L3L4_ERR; } /* enable capabilities controlled via driver startup parameters */ if (sc->sc_rss_enable) - caps_en |= MBX_RX_IFACE_FLAGS_RSS; + caps_en |= MBX_RX_IFACE_RSS; bzero(&cmd, sizeof(cmd)); @@ -3152,8 +3152,7 @@ oce_set_promisc(struct oce_softc *sc, int enable) if (enable) req->iface_flags = req->iface_flags_mask = - MBX_RX_IFACE_FLAGS_PROMISC | - MBX_RX_IFACE_FLAGS_VLAN_PROMISC; + MBX_RX_IFACE_PROMISC | MBX_RX_IFACE_VLAN_PROMISC; return (oce_cmd(sc, SUBSYS_COMMON, OPCODE_COMMON_SET_IFACE_RX_FILTER, OCE_MBX_VER_V0, &cmd, sizeof(cmd))); diff --git a/sys/dev/pci/if_ocereg.h b/sys/dev/pci/if_ocereg.h index e9fdbc9b201..ae8c993fce2 100644 --- a/sys/dev/pci/if_ocereg.h +++ b/sys/dev/pci/if_ocereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_ocereg.h,v 1.6 2012/11/26 18:58:11 mikeb Exp $ */ +/* $OpenBSD: if_ocereg.h,v 1.7 2012/11/26 19:03:59 mikeb Exp $ */ /*- * Copyright (C) 2012 Emulex @@ -79,24 +79,24 @@ #define MAC_ADDRESS_TYPE_FCOE 0x4 /* (FCoE MAC Address) */ /* CREATE_IFACE capability and cap_en flags */ -#define MBX_RX_IFACE_FLAGS_RSS 0x4 -#define MBX_RX_IFACE_FLAGS_PROMISC 0x8 -#define MBX_RX_IFACE_FLAGS_BROADCAST 0x10 -#define MBX_RX_IFACE_FLAGS_UNTAGGED 0x20 -#define MBX_RX_IFACE_FLAGS_VLAN_PROMISC 0x80 -#define MBX_RX_IFACE_FLAGS_VLAN 0x100 -#define MBX_RX_IFACE_FLAGS_MCAST_PROMISC 0x200 -#define MBX_RX_IFACE_FLAGS_PASS_L2_ERR 0x400 -#define MBX_RX_IFACE_FLAGS_PASS_L3L4_ERR 0x800 -#define MBX_RX_IFACE_FLAGS_MCAST 0x1000 -#define MBX_RX_IFACE_FLAGS_MCAST_HASH 0x2000 -#define MBX_RX_IFACE_FLAGS_HDS 0x4000 -#define MBX_RX_IFACE_FLAGS_DIRECTED 0x8000 -#define MBX_RX_IFACE_FLAGS_VMQ 0x10000 -#define MBX_RX_IFACE_FLAGS_NETQ 0x20000 -#define MBX_RX_IFACE_FLAGS_QGROUPS 0x40000 -#define MBX_RX_IFACE_FLAGS_LSO 0x80000 -#define MBX_RX_IFACE_FLAGS_LRO 0x100000 +#define MBX_RX_IFACE_RSS 0x000004 +#define MBX_RX_IFACE_PROMISC 0x000008 +#define MBX_RX_IFACE_BROADCAST 0x000010 +#define MBX_RX_IFACE_UNTAGGED 0x000020 +#define MBX_RX_IFACE_VLAN_PROMISC 0x000080 +#define MBX_RX_IFACE_VLAN 0x000100 +#define MBX_RX_IFACE_MCAST_PROMISC 0x000200 +#define MBX_RX_IFACE_PASS_L2_ERR 0x000400 +#define MBX_RX_IFACE_PASS_L3L4_ERR 0x000800 +#define MBX_RX_IFACE_MCAST 0x001000 +#define MBX_RX_IFACE_MCAST_HASH 0x002000 +#define MBX_RX_IFACE_HDS 0x004000 +#define MBX_RX_IFACE_DIRECTED 0x008000 +#define MBX_RX_IFACE_VMQ 0x010000 +#define MBX_RX_IFACE_NETQ 0x020000 +#define MBX_RX_IFACE_QGROUPS 0x040000 +#define MBX_RX_IFACE_LSO 0x080000 +#define MBX_RX_IFACE_LRO 0x100000 #define ASYNC_EVENT_CODE_LINK_STATE 0x1 #define ASYNC_EVENT_LINK_UP 0x1 |