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authoroga <oga@openbsd.org>2010-05-15 15:20:09 +0000
committeroga <oga@openbsd.org>2010-05-15 15:20:09 +0000
commitaba3e426d739b16df82361f441f0aff6e54a8e11 (patch)
tree9e5f3cea819f46b527a4593d02d975b6520e4c3f
parentproper handling of quoted tab-separated column lists (diff)
downloadwireguard-openbsd-aba3e426d739b16df82361f441f0aff6e54a8e11.tar.xz
wireguard-openbsd-aba3e426d739b16df82361f441f0aff6e54a8e11.zip
Always check the tiling mode alignment on pin, even if we don't need a
fence register. Stops some chipsets crapping out during rendering. Tested by Jan Stary; thanks!
-rw-r--r--sys/dev/pci/drm/i915_drv.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/sys/dev/pci/drm/i915_drv.c b/sys/dev/pci/drm/i915_drv.c
index d8425d24403..bd122472810 100644
--- a/sys/dev/pci/drm/i915_drv.c
+++ b/sys/dev/pci/drm/i915_drv.c
@@ -3376,8 +3376,7 @@ i915_gem_object_pin(struct drm_obj *obj, uint32_t alignment, int needs_fence)
if (obj_priv->dmamap != NULL &&
((alignment && obj_priv->gtt_offset & (alignment - 1)) ||
obj_priv->gtt_offset & (i915_gem_get_gtt_alignment(obj) - 1) ||
- (needs_fence && !i915_gem_object_fence_offset_ok(obj,
- obj_priv->tiling_mode)))) {
+ !i915_gem_object_fence_offset_ok(obj, obj_priv->tiling_mode))) {
/* if it is already pinned we sanitised the alignment then */
KASSERT(obj_priv->pin_count == 0);
if ((ret = i915_gem_object_unbind(obj, 1)))