summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authormjacob <mjacob@openbsd.org>1999-04-04 01:17:02 +0000
committermjacob <mjacob@openbsd.org>1999-04-04 01:17:02 +0000
commitac96f1909716b269a86566a9c795df3fb6d170a5 (patch)
tree363a8830f01eedbd5ca0b73be93dbdf7491f958f
parentMerge with EOM 1.74 (diff)
downloadwireguard-openbsd-ac96f1909716b269a86566a9c795df3fb6d170a5.tar.xz
wireguard-openbsd-ac96f1909716b269a86566a9c795df3fb6d170a5.zip
Read the board revision and trim cache line size back from 16 to 1
for early revision 2100 boards. Make sure to turn ROM off for these boards.
-rw-r--r--sys/dev/pci/isp_pci.c28
1 files changed, 24 insertions, 4 deletions
diff --git a/sys/dev/pci/isp_pci.c b/sys/dev/pci/isp_pci.c
index 8c6166d200d..656ac960b11 100644
--- a/sys/dev/pci/isp_pci.c
+++ b/sys/dev/pci/isp_pci.c
@@ -1,5 +1,5 @@
-/* $OpenBSD: isp_pci.c,v 1.6 1999/03/25 22:58:44 mjacob Exp $ */
-/* release_03_25_99 */
+/* $OpenBSD: isp_pci.c,v 1.7 1999/04/04 01:17:02 mjacob Exp $ */
+/* release_4_3_99 */
/*
* PCI specific probe and attach routines for Qlogic ISP SCSI adapters.
*
@@ -147,6 +147,10 @@ static struct ispmdvec mdvec_2100 = {
#define IO_MAP_REG 0x10
#define MEM_MAP_REG 0x14
+#define PCIR_ROMADDR 0x30
+
+#define PCI_DFLT_LTNCY 0x40
+#define PCI_DFLT_LNSZ 0x10
#ifndef SCSI_ISP_PREFER_MEM_MAP
#ifdef __alpha__
@@ -221,7 +225,7 @@ isp_pci_attach(parent, self, aux)
#ifdef DEBUG
static char oneshot = 1;
#endif
- u_int32_t data;
+ u_int32_t data, linesz = PCI_DFLT_LNSZ;
struct pci_attach_args *pa = aux;
struct isp_pcisoftc *pcs = (struct isp_pcisoftc *) self;
struct ispsoftc *isp = &pcs->pci_isp;
@@ -342,6 +346,17 @@ isp_pci_attach(parent, self, aux)
bzero(isp->isp_param, sizeof (fcparam));
pcs->pci_poff[MBOX_BLOCK >> _BLK_REG_SHFT] =
PCI_MBOX_REGS2100_OFF;
+
+ data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_CLASS_REG);
+ if ((data & 0xff) < 3) {
+ /*
+ * XXX: Need to get the actual revision
+ * XXX: number of the 2100 FB. At any rate,
+ * XXX: lower cache line size for early revision
+ * XXX; boards.
+ */
+ linesz = 1;
+ }
}
#endif
/*
@@ -358,7 +373,8 @@ isp_pci_attach(parent, self, aux)
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, data);
/*
- * Make sure that latency timer and cache line size is set sanely.
+ * Make sure that the latency timer, cache line size,
+ * and ROM is disabled.
*/
data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG);
data &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
@@ -367,6 +383,10 @@ isp_pci_attach(parent, self, aux)
data |= (0x10 << PCI_CACHELINE_SHIFT);
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_BHLC_REG, data);
+ data = pci_conf_read(pa->pa_pc, pa->pa_tag, PCIR_ROMADDR);
+ data &= ~1;
+ pci_conf_write(pa->pa_pc, pa->pa_tag, PCIR_ROMADDR, data);
+
#ifdef DEBUG
if (oneshot) {
oneshot = 0;