diff options
| author |   dlg <dlg@openbsd.org> | 2007-04-29 11:58:12 +0000 |
|---|---|---|
| committer | dlg <dlg@openbsd.org> | 2007-04-29 11:58:12 +0000 |
| commit | b4ebaf37b613576771d599c1674482f2cbdf6d4f (patch) | |
| tree | 860eb368f6c198fddf0f8ee2d2bf61221a0fe07d | |
| parent | all of them.... (diff) | |
| download | wireguard-openbsd-b4ebaf37b613576771d599c1674482f2cbdf6d4f.tar.xz wireguard-openbsd-b4ebaf37b613576771d599c1674482f2cbdf6d4f.zip | |
Nadav Shemer of Tehuti Networks is magical.
not leaving the gap in the txt fifo when uploading the firmware was the
cause of my fifo write bug in tht_start. because i was filling the whole
fifo, i was writing the wptr back to its original position. because of
this i dont think the firmware thought i had written anything. only the
last short chunk would have been noticed, which strikes me as possibly
confusing to the chip.
this diff removes the delay at the top of tht_fifo_post. one less XXX :)
| -rw-r--r-- | sys/dev/pci/if_tht.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/sys/dev/pci/if_tht.c b/sys/dev/pci/if_tht.c index 4d604b76077..ccd6cb1f7f9 100644 --- a/sys/dev/pci/if_tht.c +++ b/sys/dev/pci/if_tht.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_tht.c,v 1.84 2007/04/29 11:39:15 dlg Exp $ */ +/* $OpenBSD: if_tht.c,v 1.85 2007/04/29 11:58:12 dlg Exp $ */ /* * Copyright (c) 2007 David Gwynne <dlg@openbsd.org> @@ -1491,8 +1491,6 @@ tht_fifo_write_pad(struct tht_softc *sc, struct tht_fifo *tf, int bc) void tht_fifo_post(struct tht_softc *sc, struct tht_fifo *tf) { - delay(100); /* XXX this is dumb */ - bus_dmamap_sync(sc->sc_thtc->sc_dmat, THT_DMA_MAP(tf->tf_mem), 0, tf->tf_len, THT_FIFO_PRE_SYNC(tf->tf_desc)); if (tf->tf_desc->tfd_write) |