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author | 2002-07-08 20:00:18 +0000 | |
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committer | 2002-07-08 20:00:18 +0000 | |
commit | b6f91aabf242eb6fd1e914c4451c817f0ce8b133 (patch) | |
tree | 2476ec6b5417d4131a8b943fa4f218f351bb1378 | |
parent | 5821 has two additional bits that must be ack'd (note they don't have (diff) | |
download | wireguard-openbsd-b6f91aabf242eb6fd1e914c4451c817f0ce8b133.tar.xz wireguard-openbsd-b6f91aabf242eb6fd1e914c4451c817f0ce8b133.zip |
Another missing bit (appears to make the 582x series work like the 580x series
as far as key setups go).
-rw-r--r-- | sys/dev/pci/ubsecreg.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/sys/dev/pci/ubsecreg.h b/sys/dev/pci/ubsecreg.h index f5638f518f9..e47729de661 100644 --- a/sys/dev/pci/ubsecreg.h +++ b/sys/dev/pci/ubsecreg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: ubsecreg.h,v 1.24 2002/07/08 19:41:29 jason Exp $ */ +/* $OpenBSD: ubsecreg.h,v 1.25 2002/07/08 20:00:18 jason Exp $ */ /* * Copyright (c) 2000 Theo de Raadt @@ -75,6 +75,7 @@ #define BS_CTRL_RNG_4 0x00800000 /* 1bit rn/four slow clocks */ #define BS_CTRL_RNG_8 0x01000000 /* 1bit rn/eight slow clocks */ #define BS_CTRL_RNG_16 0x01800000 /* 1bit rn/16 slow clocks */ +#define BN_CTRL_SWNORM 0x00400000 /* 582[01], sw normalization */ #define BS_CTRL_FRAG_M 0x0000ffff /* output fragment size mask */ /* BS_STAT - DMA Status */ @@ -84,8 +85,8 @@ #define BS_STAT_DMAERR 0x10000000 /* DMA error */ #define BS_STAT_MCR2_FULL 0x08000000 /* MCR2 is full */ #define BS_STAT_MCR2_DONE 0x04000000 /* MCR2 is done */ -#define BS_STAT_MCR1_ALLEMPTY 0x02000000 /* MCR1 is completely empty */ -#define BS_STAT_MCR2_ALLEMPTY 0x01000000 /* MCR2 is completely empty */ +#define BS_STAT_MCR1_ALLEMPTY 0x02000000 /* 5821, MCR1 is empty */ +#define BS_STAT_MCR2_ALLEMPTY 0x01000000 /* 5821, MCR2 is empty */ /* BS_ERR - DMA Error Address */ #define BS_ERR_ADDR 0xfffffffc /* error address mask */ |