Define struct cpu_hwinfo, to hold hardware specific information about each

processor (instead of sys_config.cpu[]), and pass it in the attach_args
when attaching cpu devices.

This allows per-cpu information to be gathered late in the bootstrap process,
and not be limited by an arbitrary MAX_CPUS limit; this will suit IP27 and
IP35 systems better.

While there, use this information to make sure delay() uses the speed
information from the cpu it is invoked on.

19 files changed, 319 insertions, 300 deletions

diff --git a/distrib/sets/lists/base/md.sgi b/distrib/sets/lists/base/md.sgi
index 8a405e418be..c8521171d3b 100644
--- a/distrib/sets/lists/base/md.sgi
+++ b/distrib/sets/lists/base/md.sgi
@@ -1823,6 +1823,7 @@
 ./usr/libdata/perl5/site_perl/mips64-openbsd/mips64/archtype.ph
 ./usr/libdata/perl5/site_perl/mips64-openbsd/mips64/asm.ph
 ./usr/libdata/perl5/site_perl/mips64-openbsd/mips64/atomic.ph
+./usr/libdata/perl5/site_perl/mips64-openbsd/mips64/autoconf.ph
 ./usr/libdata/perl5/site_perl/mips64-openbsd/mips64/cdefs.ph
 ./usr/libdata/perl5/site_perl/mips64-openbsd/mips64/cpu.ph
 ./usr/libdata/perl5/site_perl/mips64-openbsd/mips64/cpustate.ph
diff --git a/distrib/sets/lists/comp/md.sgi b/distrib/sets/lists/comp/md.sgi
index eff447e5e95..40ebd9b0c9c 100644
--- a/distrib/sets/lists/comp/md.sgi
+++ b/distrib/sets/lists/comp/md.sgi
@@ -155,6 +155,7 @@
 ./usr/include/mips64/archtype.h
 ./usr/include/mips64/asm.h
 ./usr/include/mips64/atomic.h
+./usr/include/mips64/autoconf.h
 ./usr/include/mips64/cdefs.h
 ./usr/include/mips64/cpu.h
 ./usr/include/mips64/cpustate.h
diff --git a/sys/arch/loongson/dev/mainbus.c b/sys/arch/loongson/dev/mainbus.c
index 7e81a82f3db..8def1cfd57b 100644
--- a/sys/arch/loongson/dev/mainbus.c
+++ b/sys/arch/loongson/dev/mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mainbus.c,v 1.1.1.1 2009/12/25 21:11:09 miod Exp $ */
+/*	$OpenBSD: mainbus.c,v 1.2 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -58,18 +58,20 @@ mainbus_match(struct device *parent, void *cfdata, void *aux)
 void
 mainbus_attach(struct device *parent, struct device *self, void *aux)
 {
-	struct mainbus_attach_args maa;
+	struct cpu_attach_args caa;
 
 	printf("\n");
 
-	bzero(&maa, sizeof maa);
-	maa.maa_name = "cpu";
-	config_found(self, &maa, mainbus_print);
-	maa.maa_name = "clock";
-	config_found(self, &maa, mainbus_print);
+	bzero(&caa, sizeof caa);
+	caa.caa_maa.maa_name = "cpu";
+	caa.caa_hw = &bootcpu_hwinfo;
+	config_found(self, &caa, mainbus_print);
 
-	maa.maa_name = "bonito";
-	config_found(self, &maa, mainbus_print);
+	caa.caa_maa.maa_name = "clock";
+	config_found(self, &caa.caa_maa, mainbus_print);
+
+	caa.caa_maa.maa_name = "bonito";
+	config_found(self, &caa.caa_maa, mainbus_print);
 }
 
 int
diff --git a/sys/arch/loongson/include/autoconf.h b/sys/arch/loongson/include/autoconf.h
index 122048d7a0c..eb471091533 100644
--- a/sys/arch/loongson/include/autoconf.h
+++ b/sys/arch/loongson/include/autoconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.h,v 1.1.1.1 2009/11/21 18:30:18 miod Exp $ */
+/*	$OpenBSD: autoconf.h,v 1.2 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -38,23 +38,9 @@
 /*
  * Structure holding all misc config information.
  */
-#define MAX_CPUS	1
-
 struct sys_rec {
 	int	system_type;
 
-	struct cpuinfo {
-		u_int16_t type;
-		u_int8_t  vers_maj;
-		u_int8_t  vers_min;
-		u_int16_t fptype;
-		u_int8_t  fpvers_maj;
-		u_int8_t  fpvers_min;
-		u_int32_t clock;
-		u_int32_t tlbsize;
-		u_int32_t tlbwired;
-	} cpu[MAX_CPUS];
-
 	/* Serial console configuration. */
 	struct mips_bus_space console_io;
 };
@@ -65,4 +51,6 @@ struct mainbus_attach_args {
 	const char	*maa_name;
 };
 
+#include <mips64/autoconf.h>
+
 #endif /* _MACHINE_AUTOCONF_H_ */
diff --git a/sys/arch/loongson/loongson/machdep.c b/sys/arch/loongson/loongson/machdep.c
index 5671415c5ee..5b59fedf80b 100644
--- a/sys/arch/loongson/loongson/machdep.c
+++ b/sys/arch/loongson/loongson/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.1.1.1 2009/12/25 22:06:03 miod Exp $ */
+/*	$OpenBSD: machdep.c,v 1.2 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -107,6 +107,7 @@ struct	user *proc0paddr;
 int	kbd_reset;
 
 struct sys_rec sys_config;
+struct cpu_hwinfo bootcpu_hwinfo;
 
 /* Pointers to the start and end of the symbol table. */
 caddr_t	ssym;
@@ -274,7 +275,7 @@ mips_init(int32_t argc, int32_t argv, int32_t envp, int32_t cv)
 		cpuspeed = atoi(envvar, 10);	/* speed in Hz */
 	if (cpuspeed < 100 * 1000000)
 		cpuspeed = 797000000;  /* Reasonable default */
-	sys_config.cpu[0].clock = cpuspeed;
+	bootcpu_hwinfo.clock = cpuspeed;
 
 	/*
 	 * Look at arguments passed to us and compute boothowto.
@@ -385,15 +386,11 @@ mips_init(int32_t argc, int32_t argv, int32_t envp, int32_t cv)
 		}
 	}
 
-	sys_config.cpu[0].type = (prid >> 8) & 0xff;
-	sys_config.cpu[0].vers_maj = (prid >> 4) & 0x0f;
-	sys_config.cpu[0].vers_min = prid & 0x0f;
+	bootcpu_hwinfo.c0prid = prid;
+	bootcpu_hwinfo.type = (prid >> 8) & 0xff;
 	/* FPU reports itself as type 5, version 0.1... */
-	sys_config.cpu[0].fptype = sys_config.cpu[0].type;
-	sys_config.cpu[0].fpvers_maj = sys_config.cpu[0].vers_maj;
-	sys_config.cpu[0].fpvers_min = sys_config.cpu[0].vers_min;
-
-	sys_config.cpu[0].tlbsize = 64;
+	bootcpu_hwinfo.c1prid = bootcpu_hwinfo.c0prid;
+	bootcpu_hwinfo.tlbsize = 64;
 
 	/*
 	 * Configure cache.
@@ -403,11 +400,10 @@ mips_init(int32_t argc, int32_t argv, int32_t envp, int32_t cv)
 
 	Loongson2_ConfigCache();
 
-	sys_config.cpu[0].tlbwired = UPAGES / 2;
 	tlb_set_page_mask(TLB_PAGE_MASK);
 	tlb_set_wired(0);
-	tlb_flush(sys_config.cpu[0].tlbsize);
-	tlb_set_wired(sys_config.cpu[0].tlbwired);
+	tlb_flush(bootcpu_hwinfo.tlbsize);
+	tlb_set_wired(UPAGES / 2);
 
 	/*
 	 * Get a console, very early but after initial mapping setup.
@@ -707,7 +703,7 @@ setregs(p, pack, stack, retval)
 	u_long stack;
 	register_t *retval;
 {
-	extern struct proc *machFPCurProcPtr;
+	struct cpu_info *ci = curcpu();
 
 	bzero((caddr_t)p->p_md.md_regs, sizeof(struct trap_frame));
 	p->p_md.md_regs->sp = stack;
@@ -718,8 +714,8 @@ setregs(p, pack, stack, retval)
 	p->p_md.md_regs->sr |= idle_mask & SR_INT_MASK;
 	p->p_md.md_regs->ic = (idle_mask << 8) & IC_INT_MASK;
 	p->p_md.md_flags &= ~MDP_FPUSED;
-	if (machFPCurProcPtr == p)
-		machFPCurProcPtr = NULL;
+	if (ci->ci_fpuproc == p)
+		ci->ci_fpuproc = NULL;
 	p->p_md.md_ss_addr = 0;
 	p->p_md.md_pc_ctrl = 0;
 	p->p_md.md_watch_1 = 0;
diff --git a/sys/arch/mips64/include/autoconf.h b/sys/arch/mips64/include/autoconf.h
new file mode 100644
index 00000000000..1a1519f9971
--- /dev/null
+++ b/sys/arch/mips64/include/autoconf.h
@@ -0,0 +1,35 @@
+/*	$OpenBSD: autoconf.h,v 1.1 2010/01/09 20:33:16 miod Exp $	*/
+
+/*
+ * Copyright (c) 2010 Miodrag Vallat.
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Common defines used by autoconf on all mips64-based platforms.
+ */
+
+#ifndef	_MIPS64_AUTOCONF_H_
+#define	_MIPS64_AUTOCONF_H_
+
+#include <machine/cpu.h>		/* for struct cpu_hwinfo */
+
+struct cpu_attach_args {
+	struct mainbus_attach_args	 caa_maa;
+	struct cpu_hwinfo		*caa_hw;
+};
+
+extern struct cpu_hwinfo bootcpu_hwinfo;
+
+#endif /* _MIPS64_AUTOCONF_H_ */
diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h
index cb2d70e10d1..e60cd3f65d1 100644
--- a/sys/arch/mips64/include/cpu.h
+++ b/sys/arch/mips64/include/cpu.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.h,v 1.51 2010/01/08 01:35:52 syuu Exp $	*/
+/*	$OpenBSD: cpu.h,v 1.52 2010/01/09 20:33:16 miod Exp $	*/
 
 /*-
  * Copyright (c) 1992, 1993
@@ -364,21 +364,30 @@ extern vaddr_t uncached_base;
 
 #include <machine/intr.h>
 
+struct cpu_hwinfo {
+	uint32_t	c0prid;
+	uint32_t	c1prid;
+	uint32_t	clock;	/* Hz */
+	uint32_t	tlbsize;
+	uint		type;
+};
+
 struct cpu_info {
-	struct device   *ci_dev;	/* our device */
-	struct cpu_info *ci_self;	/* pointer to this structure */
-	struct cpu_info *ci_next;	/* next cpu */
+	struct device	*ci_dev;	/* our device */
+	struct cpu_info	*ci_self;	/* pointer to this structure */
+	struct cpu_info	*ci_next;	/* next cpu */
 	struct proc	*ci_curproc;
 	struct user	*ci_curprocpaddr;
 	struct proc	*ci_fpuproc;	/* pointer to last proc to use FP */
-
+	struct cpu_hwinfo
+			ci_hw;
 	struct schedstate_percpu
 			ci_schedstate;
 	int		ci_want_resched;	/* need_resched() invoked */
-	cpuid_t		ci_cpuid;              /* our CPU ID */
+	cpuid_t		ci_cpuid;		/* our CPU ID */
 	uint32_t	ci_randseed;		/* per cpu random seed */
-	int		ci_ipl;		/* software IPL */
-	uint32_t	ci_softpending;	/* pending soft interrupts */
+	int		ci_ipl;			/* software IPL */
+	uint32_t	ci_softpending;		/* pending soft interrupts */
 	int		ci_clock_started;
 	u_int32_t	ci_cpu_counter_last;
 	u_int32_t	ci_cpu_counter_interval;
diff --git a/sys/arch/mips64/mips64/clock.c b/sys/arch/mips64/mips64/clock.c
index 02c7de179dc..a0f7f530d06 100644
--- a/sys/arch/mips64/mips64/clock.c
+++ b/sys/arch/mips64/mips64/clock.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: clock.c,v 1.31 2009/12/28 06:55:27 syuu Exp $ */
+/*	$OpenBSD: clock.c,v 1.32 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -52,6 +52,7 @@ struct cfattach clock_ca = {
 	sizeof(struct device), clockmatch, clockattach
 };
 
+void	clock_calibrate(struct cpu_info *);
 uint32_t clock_int5(uint32_t, struct trap_frame *);
 
 u_int cp0_get_timecount(struct timecounter *);
@@ -188,9 +189,10 @@ delay(int n)
 {
 	int dly;
 	int p, c;
+	struct cpu_info *ci = curcpu();
 
 	p = cp0_get_count();
-	dly = (sys_config.cpu[0].clock / 1000000) * n / 2;
+	dly = (ci->ci_hw.clock / 1000000) * n / 2;
 	while (dly > 0) {
 		c = cp0_get_count();
 		dly -= c - p;
@@ -205,49 +207,57 @@ delay(int n)
 struct tod_desc sys_tod;
 
 /*
- * Start the real-time and statistics clocks. Leave stathz 0 since there
- * are no other timers available.
+ * Calibrate cpu clock against the TOD clock if available.
  */
 void
-cpu_initclocks()
+clock_calibrate(struct cpu_info *ci)
 {
 	struct tod_desc *cd = &sys_tod;
 	struct tod_time ct;
 	u_int first_cp0, second_cp0, cycles_per_sec;
 	int first_sec;
+
+	if (cd->tod_get == NULL)
+		return;
+
+	(*cd->tod_get)(cd->tod_cookie, 0, &ct);
+	first_sec = ct.sec;
+
+	/* Let the clock tick one second. */
+	do {
+		first_cp0 = cp0_get_count();
+		(*cd->tod_get)(cd->tod_cookie, 0, &ct);
+	} while (ct.sec == first_sec);
+	first_sec = ct.sec;
+	/* Let the clock tick one more second. */
+	do {
+		second_cp0 = cp0_get_count();
+		(*cd->tod_get)(cd->tod_cookie, 0, &ct);
+	} while (ct.sec == first_sec);
+
+	cycles_per_sec = second_cp0 - first_cp0;
+	ci->ci_hw.clock = cycles_per_sec * 2;
+}
+
+/*
+ * Start the real-time and statistics clocks. Leave stathz 0 since there
+ * are no other timers available.
+ */
+void
+cpu_initclocks()
+{
 	struct cpu_info *ci = curcpu();
 
 	hz = 100;
 	profhz = 100;
 	stathz = 0;	/* XXX no stat clock yet */
 
-	/*
-	 * Calibrate the cycle counter frequency.
-	 */
-	if (cd->tod_get != NULL) {
-		(*cd->tod_get)(cd->tod_cookie, 0, &ct);
-		first_sec = ct.sec;
-
-		/* Let the clock tick one second. */
-		do {
-			first_cp0 = cp0_get_count();
-			(*cd->tod_get)(cd->tod_cookie, 0, &ct);
-		} while (ct.sec == first_sec);
-		first_sec = ct.sec;
-		/* Let the clock tick one more second. */
-		do {
-			second_cp0 = cp0_get_count();
-			(*cd->tod_get)(cd->tod_cookie, 0, &ct);
-		} while (ct.sec == first_sec);
-
-		cycles_per_sec = second_cp0 - first_cp0;
-		sys_config.cpu[0].clock = cycles_per_sec * 2;
-	}
+	clock_calibrate(ci);
 
 	tick = 1000000 / hz;	/* number of micro-seconds between interrupts */
 	tickadj = 240000 / (60 * hz);		/* can adjust 240ms in 60s */
 
-	cp0_timecounter.tc_frequency = sys_config.cpu[0].clock / 2;
+	cp0_timecounter.tc_frequency = (uint64_t)ci->ci_hw.clock / 2;
 	tc_init(&cp0_timecounter);
 	cpu_startclock(ci);
 }
@@ -264,11 +274,13 @@ cpu_startclock(struct cpu_info *ci)
 
 		/* try to avoid getting clock interrupts early */
 		cp0_set_compare(cp0_get_count() - 1);
+
+		clock_calibrate(ci);
 	}
 
 	/* Start the clock. */
 	s = splclock();
-	ci->ci_cpu_counter_interval = cp0_timecounter.tc_frequency / hz;
+	ci->ci_cpu_counter_interval = (ci->ci_hw.clock / 2) / hz;
 	ci->ci_cpu_counter_last = cp0_get_count() + ci->ci_cpu_counter_interval;
 	cp0_set_compare(ci->ci_cpu_counter_last);
 	ci->ci_clock_started++;
@@ -309,7 +321,7 @@ inittodr(time_t base)
 	if (base < 35 * SECYR) {
 		printf("WARNING: preposterous time in file system");
 		/* read the system clock anyway */
-		base = 38 * SECYR;	/* 2008 */
+		base = 40 * SECYR;	/* 2010 */
 	}
 
 	/*
@@ -414,5 +426,6 @@ resettodr()
 u_int
 cp0_get_timecount(struct timecounter *tc)
 {
+	/* XXX SMP */
 	return (cp0_get_count());
 }
diff --git a/sys/arch/mips64/mips64/cpu.c b/sys/arch/mips64/mips64/cpu.c
index 0dd44178805..5c7a6e5d2e3 100644
--- a/sys/arch/mips64/mips64/cpu.c
+++ b/sys/arch/mips64/mips64/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.23 2010/01/08 01:35:52 syuu Exp $ */
+/*	$OpenBSD: cpu.c,v 1.24 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se)
@@ -80,13 +80,10 @@ struct cfdriver cpu_cd = {
 int
 cpumatch(struct device *parent, void *match, void *aux)
 {
-	struct cfdata *cf = match;
-	struct mainbus_attach_args *maa = aux;
+	struct cpu_attach_args *caa = aux;
 
 	/* make sure that we're looking for a CPU. */
-	if (strcmp(maa->maa_name, cpu_cd.cd_name) != 0)
-		return 0;
-	if (cf->cf_unit >= MAX_CPUS)
+	if (strcmp(caa->caa_maa.maa_name, cpu_cd.cd_name) != 0)
 		return 0;
 
 	return 20;	/* Make CPU probe first */
@@ -95,9 +92,12 @@ cpumatch(struct device *parent, void *match, void *aux)
 void
 cpuattach(struct device *parent, struct device *dev, void *aux)
 {
+	struct cpu_attach_args *caa = aux;
+	struct cpu_hwinfo *ch = caa->caa_hw;
 	struct cpu_info *ci;
 	int cpuno = dev->dv_unit;
 	int isr16k = 0;
+	int fptype, vers_maj, vers_min;
 	int displayver;
 
 	if (cpuno == 0) {
@@ -122,11 +122,14 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 	ci->ci_self = ci;
 	ci->ci_cpuid = cpuno;
 	ci->ci_dev = dev;
+	bcopy(ch, &ci->ci_hw, sizeof(struct cpu_hwinfo));
 
 	printf(": ");
 
 	displayver = 1;
-	switch (sys_config.cpu[cpuno].type) {
+	vers_maj = (ch->c0prid >> 4) & 0x0f;
+	vers_min = ch->c0prid & 0x0f;
+	switch (ch->type) {
 	case MIPS_R4000:
 		if (CpuPrimaryInstCacheSize == 16384)
 			printf("MIPS R4400 CPU");
@@ -143,8 +146,8 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 		printf("MIPS R12000 CPU");
 		break;
 	case MIPS_R14000:
-		if (sys_config.cpu[cpuno].vers_maj > 2) {
-			sys_config.cpu[cpuno].vers_maj -= 2;
+		if (vers_maj > 2) {
+			vers_maj -= 2;
 			isr16k = 1;
 		}
 		printf("R1%d000 CPU", isr16k ? 6 : 4);
@@ -168,7 +171,7 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 		printf("PMC-Sierra RM52X0 CPU");
 		break;
 	case MIPS_RM7000:
-		if (sys_config.cpu[cpuno].vers_maj < 2)
+		if (vers_maj < 2)
 			printf("PMC-Sierra RM7000 CPU");
 		else
 			printf("PMC-Sierra RM7000A CPU");
@@ -178,21 +181,22 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 		printf("PMC-Sierra RM9000 CPU");
 		break;
 	case MIPS_LOONGSON2:
-		printf("STC Loongson2%c CPU",
-		    'C' + sys_config.cpu[cpuno].vers_min);
+		printf("STC Loongson2%c CPU", 'C' + vers_min);
 		displayver = 0;
 		break;
 	default:
-		printf("Unknown CPU type (0x%x)",sys_config.cpu[cpuno].type);
+		printf("Unknown CPU type (0x%x)", ch->type);
 		break;
 	}
 	if (displayver != 0)
-		printf(" rev %d.%d", sys_config.cpu[cpuno].vers_maj,
-		    sys_config.cpu[cpuno].vers_min);
-	printf(" %d MHz, ", sys_config.cpu[cpuno].clock / 1000000);
+		printf(" rev %d.%d", vers_maj, vers_min);
+	printf(" %d MHz, ", ch->clock / 1000000);
 
 	displayver = 1;
-	switch (sys_config.cpu[cpuno].fptype) {
+	fptype = (ch->c1prid >> 8) & 0xff;
+	vers_maj = (ch->c1prid >> 4) & 0x0f;
+	vers_min = ch->c1prid & 0x0f;
+	switch (fptype) {
 	case MIPS_SOFT:
 		printf("Software FP emulation");
 		break;
@@ -230,17 +234,15 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 		printf("RM9000 FPC");
 		break;
 	case MIPS_LOONGSON2:
-		printf("STC Loongson2%c FPU",
-		    'C' + sys_config.cpu[cpuno].fpvers_min);
+		printf("STC Loongson2%c FPU", 'C' + vers_min);
 		displayver = 0;
 		break;
 	default:
-		printf("Unknown FPU type (0x%x)", sys_config.cpu[cpuno].fptype);
+		printf("Unknown FPU type (0x%x)", fptype);
 		break;
 	}
 	if (displayver != 0)
-		printf(" rev %d.%d", sys_config.cpu[cpuno].fpvers_maj,
-		    sys_config.cpu[cpuno].fpvers_min);
+		printf(" rev %d.%d", vers_maj, vers_min);
 	printf("\n");
 
 	printf("cpu%d: cache L1-I %dKB", cpuno, CpuPrimaryInstCacheSize / 1024);
@@ -259,7 +261,7 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 	}
 
 	if (CpuSecondaryCacheSize != 0) {
-		switch (sys_config.cpu[cpuno].type) {
+		switch (ch->type) {
 		case MIPS_R10000:
 		case MIPS_R12000:
 		case MIPS_R14000:
@@ -285,7 +287,7 @@ cpuattach(struct device *parent, struct device *dev, void *aux)
 	printf("cpu%d: Alias mask 0x%x\n", cpuno, CpuCacheAliasMask);
 	printf("cpu%d: Config Register %x\n", cpuno, CpuConfigRegister);
 	printf("cpu%d: Cache type %x\n", cpuno, CpuCacheType);
-	if (sys_config.cpu[cpuno].fptype == MIPS_RM7000) {
+	if (ch->type == MIPS_RM7000) {
 		u_int tmp = CpuConfigRegister;
 
 		printf("cpu%d: ", cpuno);
diff --git a/sys/arch/mips64/mips64/db_machdep.c b/sys/arch/mips64/mips64/db_machdep.c
index 4dc4e3b8f80..9cd02ddadf2 100644
--- a/sys/arch/mips64/mips64/db_machdep.c
+++ b/sys/arch/mips64/mips64/db_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: db_machdep.c,v 1.21 2009/12/25 21:02:15 miod Exp $ */
+/*	$OpenBSD: db_machdep.c,v 1.22 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 1998-2003 Opsycon AB (www.opsycon.se)
@@ -552,6 +552,7 @@ db_dump_tlb_cmd(db_expr_t addr, int have_addr, db_expr_t count, char *m)
 {
 	int tlbno, last, check, pid;
 	struct tlb_entry tlb, tlbp;
+	struct cpu_info *ci = curcpu();
 char *attr[] = {
 	"WTNA", "WTA ", "UCBL", "CWB ", "RES ", "RES ", "UCNB", "BPAS"
 };
@@ -562,10 +563,10 @@ char *attr[] = {
 		if (have_addr && addr < 256) {
 			pid = addr;
 			tlbno = 0;
-			count = sys_config.cpu[0].tlbsize;
+			count = ci->ci_hw.tlbsize;
 		}
 	} else if (m[0] == 'c') {
-		last = sys_config.cpu[0].tlbsize;
+		last = ci->ci_hw.tlbsize;
 		for (tlbno = 0; tlbno < last; tlbno++) {
 			tlb_read(tlbno, &tlb);
 			for (check = tlbno + 1; check < last; check++) {
@@ -581,17 +582,16 @@ if ((tlbp.tlb_hi == tlb.tlb_hi && (tlb.tlb_lo0 & PG_V || tlb.tlb_lo1 & PG_V)) ||
 		}
 		return;
 	} else {
-		if (have_addr && addr < sys_config.cpu[0].tlbsize) {
+		if (have_addr && addr < ci->ci_hw.tlbsize) {
 			tlbno = addr;
-		}
-			else {
+		} else {
 			tlbno = 0;
-			count = sys_config.cpu[0].tlbsize;
+			count = ci->ci_hw.tlbsize;
 		}
 	}
 	last = tlbno + count;
 
-	for (; tlbno < sys_config.cpu[0].tlbsize && tlbno < last; tlbno++) {
+	for (; tlbno < ci->ci_hw.tlbsize && tlbno < last; tlbno++) {
 		tlb_read(tlbno, &tlb);
 
 		if (pid >= 0 && (tlb.tlb_hi & 0xff) != pid)
diff --git a/sys/arch/mips64/mips64/pmap.c b/sys/arch/mips64/mips64/pmap.c
index e3d3bb607ed..6f274949350 100644
--- a/sys/arch/mips64/mips64/pmap.c
+++ b/sys/arch/mips64/mips64/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.46 2010/01/05 06:44:58 syuu Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.47 2010/01/09 20:33:16 miod Exp $	*/
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -1385,14 +1385,15 @@ pmap_alloc_tlbpid(struct proc *p)
 {
 	pmap_t pmap;
 	uint id;
-	u_long cpuid = cpu_number();
+	struct cpu_info *ci = curcpu();
+	u_long cpuid = ci->ci_cpuid;
 
 	pmap = p->p_vmspace->vm_map.pmap;
 	if (pmap->pm_asid[cpuid].pma_asidgen != 
 	    pmap_asid_info[cpuid].pma_asidgen) {
 		id = pmap_asid_info[cpuid].pma_asid;
 		if (id >= VMNUM_PIDS) {
-			tlb_flush(sys_config.cpu[0].tlbsize);
+			tlb_flush(ci->ci_hw.tlbsize);
 			/* reserve tlbpid_gen == 0 to alway mean invalid */
 			if (++pmap_asid_info[cpuid].pma_asidgen == 0)
 				pmap_asid_info[cpuid].pma_asidgen = 1;
diff --git a/sys/arch/sgi/include/autoconf.h b/sys/arch/sgi/include/autoconf.h
index f3466677cea..f638cd0a560 100644
--- a/sys/arch/sgi/include/autoconf.h
+++ b/sys/arch/sgi/include/autoconf.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: autoconf.h,v 1.27 2009/12/25 21:02:18 miod Exp $ */
+/*	$OpenBSD: autoconf.h,v 1.28 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -38,24 +38,10 @@
 /*
  * Structure holding all misc config information.
  */
-#define MAX_CPUS	4
-
 struct sys_rec {
 	int	system_type;
 	int	system_subtype;		/* IP35 only */
 
-	struct cpuinfo {
-		u_int16_t type;
-		u_int8_t  vers_maj;
-		u_int8_t  vers_min;
-		u_int16_t fptype;
-		u_int8_t  fpvers_maj;
-		u_int8_t  fpvers_min;
-		u_int32_t clock;
-		u_int32_t tlbsize;
-		u_int32_t tlbwired;
-	} cpu[MAX_CPUS];
-
 	/* Published cache operations. */
 	void    (*_SyncCache)(void);
 	void    (*_InvalidateICache)(vaddr_t, size_t);
@@ -75,6 +61,8 @@ struct mainbus_attach_args {
 	int16_t		 maa_nasid;
 };
 
+#include <mips64/autoconf.h>
+
 void	enaddr_aton(const char *, u_int8_t *);
 u_long	bios_getenvint(const char *);
 
diff --git a/sys/arch/sgi/include/mnode.h b/sys/arch/sgi/include/mnode.h
index 08085e543cf..bae3ec5b698 100644
--- a/sys/arch/sgi/include/mnode.h
+++ b/sys/arch/sgi/include/mnode.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mnode.h,v 1.11 2009/10/16 00:15:48 miod Exp $ */
+/*	$OpenBSD: mnode.h,v 1.12 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -411,7 +411,6 @@ typedef struct gda {
 console_t *kl_get_console(void);
 void	kl_init(int);
 void	kl_scan_config(int);
-void	kl_scan_done(void);
 int	kl_scan_node(int, uint, int (*)(lboard_t *, void *), void *);
 #define	KLBRD_ANY	0
 int	kl_scan_board(lboard_t *, uint, int (*)(klinfo_t *, void *), void *);
diff --git a/sys/arch/sgi/sgi/ip27_machdep.c b/sys/arch/sgi/sgi/ip27_machdep.c
index 28c59286b25..a9e4db2563b 100644
--- a/sys/arch/sgi/sgi/ip27_machdep.c
+++ b/sys/arch/sgi/sgi/ip27_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip27_machdep.c,v 1.41 2009/12/04 22:48:11 miod Exp $	*/
+/*	$OpenBSD: ip27_machdep.c,v 1.42 2010/01/09 20:33:16 miod Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009 Miodrag Vallat.
@@ -205,7 +205,6 @@ ip27_setup()
 			continue;
 		kl_scan_config(gda->nasid[node]);
 	}
-	kl_scan_done();
 
 	/*
 	 * Initialize the early console parameters.
@@ -312,7 +311,7 @@ ip27_setup()
 void
 ip27_autoconf(struct device *parent)
 {
-	struct mainbus_attach_args maa;
+	struct cpu_attach_args caa;
 	uint node;
 
 	/*
@@ -320,12 +319,13 @@ ip27_autoconf(struct device *parent)
 	 * if any, will get attached as they are discovered.
 	 */
 
-	bzero(&maa, sizeof maa);
-	maa.maa_nasid = currentnasid = masternasid;
-	maa.maa_name = "cpu";
-	config_found(parent, &maa, ip27_print);
-	maa.maa_name = "clock";
-	config_found(parent, &maa, ip27_print);
+	bzero(&caa, sizeof caa);
+	caa.caa_maa.maa_name = "cpu";
+	caa.caa_maa.maa_nasid = currentnasid = masternasid;
+	caa.caa_hw = &bootcpu_hwinfo;
+	config_found(parent, &caa, ip27_print);
+	caa.caa_maa.maa_name = "clock";
+	config_found(parent, &caa.caa_maa, ip27_print);
 
 	/*
 	 * Now attach all nodes' I/O devices.
diff --git a/sys/arch/sgi/sgi/ip30_machdep.c b/sys/arch/sgi/sgi/ip30_machdep.c
index ea2de7e835b..64392b292ed 100644
--- a/sys/arch/sgi/sgi/ip30_machdep.c
+++ b/sys/arch/sgi/sgi/ip30_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip30_machdep.c,v 1.29 2010/01/05 06:44:58 syuu Exp $	*/
+/*	$OpenBSD: ip30_machdep.c,v 1.30 2010/01/09 20:33:16 miod Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009 Miodrag Vallat.
@@ -149,10 +149,14 @@ ip30_setup()
 	xbow_widget_map = ip30_widget_map;
 	xbow_widget_id = ip30_widget_id;
 
+	bootcpu_hwinfo.c0prid = cp0_get_prid();
+	bootcpu_hwinfo.c1prid = cp1_get_prid();
 	cpuspeed = bios_getenvint("cpufreq");
 	if (cpuspeed < 100)
 		cpuspeed = 175;		/* reasonable default */
-	sys_config.cpu[0].clock = cpuspeed * 1000000;
+	bootcpu_hwinfo.clock = cpuspeed * 1000000;
+	bootcpu_hwinfo.tlbsize = 64;	/* R10000 family */
+	bootcpu_hwinfo.type = (bootcpu_hwinfo.c0prid >> 8) & 0xff;
 
 	/*
 	 * Initialize the early console parameters.
@@ -197,25 +201,43 @@ ip30_setup()
 void
 ip30_autoconf(struct device *parent)
 {
-	struct mainbus_attach_args maa;
+	struct cpu_attach_args caa;
+#ifdef MULTIPROCESSOR
+	struct cpu_hwinfo hw;
+	int cpuid;
+#endif
 
-	bzero(&maa, sizeof maa);
-	maa.maa_nasid = masternasid;
-	maa.maa_name = "cpu";
-	config_found(parent, &maa, mbprint);
+	bzero(&caa, sizeof caa);
+	caa.caa_maa.maa_nasid = masternasid;
+	caa.caa_maa.maa_name = "cpu";
+	caa.caa_hw = &bootcpu_hwinfo;
+	config_found(parent, &caa, mbprint);
 
 #ifdef MULTIPROCESSOR
-	int cpuid;
-	for(cpuid = 1; cpuid < MAXCPUS; cpuid++)
-		if (ip30_cpu_exists(cpuid))
-			config_found(parent, &maa, mbprint);
+	for (cpuid = 1; cpuid < MAXCPUS; cpuid++)
+		if (ip30_cpu_exists(cpuid)) {
+			/*
+			 * Attach other processors with the same hardware
+			 * information as the boot processor, unless we
+			 * can get this information from the MPCONF area;
+			 * since Octane processors should be identical
+			 * (model, speed and cache), this should be safe.
+			 */
+			bcopy(&bootcpu_hwinfo, &hw, sizeof(struct cpu_hwinfo));
+			hw.c0prid = 
+		           *(volatile uint32_t *)(mpconf + MPCONF_PRID(cpuid));
+			hw.type = (hw.c0prid >> 8) & 0xff;
+			caa.caa_hw = &hw;
+			config_found(parent, &caa, mbprint);
+		}
 #endif
-	maa.maa_name = "clock";
-	config_found(parent, &maa, mbprint);
-	maa.maa_name = "xbow";
-	config_found(parent, &maa, mbprint);
-	maa.maa_name = "power";
-	config_found(parent, &maa, mbprint);
+
+	caa.caa_maa.maa_name = "clock";
+	config_found(parent, &caa.caa_maa, mbprint);
+	caa.caa_maa.maa_name = "xbow";
+	config_found(parent, &caa.caa_maa, mbprint);
+	caa.caa_maa.maa_name = "power";
+	config_found(parent, &caa.caa_maa, mbprint);
 }
 
 /*
@@ -385,7 +407,6 @@ hw_cpu_boot_secondary(struct cpu_info *ci)
 void
 hw_cpu_hatch(struct cpu_info *ci)
 {
-       int cpuid = ci->ci_cpuid;
        int s;
 
        /*
@@ -395,25 +416,12 @@ hw_cpu_hatch(struct cpu_info *ci)
         */
        setsr(getsr() | SR_KX | SR_UX);
 
-       /*
-        * Determine system type and set up configuration record data.
-        */
-       sys_config.cpu[cpuid].clock = sys_config.cpu[0].clock;
-       sys_config.cpu[cpuid].type = (cp0_get_prid() >> 8) & 0xff;
-       sys_config.cpu[cpuid].vers_maj = (cp0_get_prid() >> 4) & 0x0f;
-       sys_config.cpu[cpuid].vers_min = cp0_get_prid() & 0x0f;
-       sys_config.cpu[cpuid].fptype = (cp1_get_prid() >> 8) & 0xff;
-       sys_config.cpu[cpuid].fpvers_maj = (cp1_get_prid() >> 4) & 0x0f;
-       sys_config.cpu[cpuid].fpvers_min = cp1_get_prid() & 0x0f;
-       sys_config.cpu[cpuid].tlbsize = 64;
-
        Mips10k_ConfigCache();
 
-       sys_config.cpu[cpuid].tlbwired = UPAGES / 2;
 	tlb_set_page_mask(TLB_PAGE_MASK);
-       tlb_set_wired(0);
-       tlb_flush(sys_config.cpu[cpuid].tlbsize);
-       tlb_set_wired(sys_config.cpu[cpuid].tlbwired);
+	tlb_set_wired(0);
+	tlb_flush(64);
+	tlb_set_wired(UPAGES / 2);
 
        tlb_set_pid(0);
 
@@ -427,11 +435,11 @@ hw_cpu_hatch(struct cpu_info *ci)
         */
        Mips_SyncCache();
 
+       cpu_startclock(ci);
+
        ncpus++;
        cpuset_add(&cpus_running, ci);
 
-       cpu_startclock(ci);
-
        mips64_ipi_init();
        xheart_setintrmask(0);
 
diff --git a/sys/arch/sgi/sgi/ip32_machdep.c b/sys/arch/sgi/sgi/ip32_machdep.c
index a5d6e10e228..bb6b2272541 100644
--- a/sys/arch/sgi/sgi/ip32_machdep.c
+++ b/sys/arch/sgi/sgi/ip32_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip32_machdep.c,v 1.12 2009/11/19 20:16:27 miod Exp $ */
+/*	$OpenBSD: ip32_machdep.c,v 1.13 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -127,10 +127,74 @@ ip32_setup()
 		break;
 	}
 
+	bootcpu_hwinfo.c0prid = cp0_get_prid();
+	bootcpu_hwinfo.c1prid = cp1_get_prid();
 	cpuspeed = bios_getenvint("cpufreq");
 	if (cpuspeed < 100)
 		cpuspeed = 180;		/* reasonable default */
-	sys_config.cpu[0].clock = cpuspeed * 1000000;
+	bootcpu_hwinfo.clock = cpuspeed * 1000000;
+	bootcpu_hwinfo.type = (bootcpu_hwinfo.c0prid >> 8) & 0xff;
+
+	/*
+	 * Figure out how many TLB are available.
+	 */
+	switch (bootcpu_hwinfo.type) {
+#ifdef CPU_RM7000
+	case MIPS_RM7000:
+		/*
+		 * Rev A (version >= 2) CPU's have 64 TLB entries.
+		 *
+		 * However, the last 16 are only enabled if one
+		 * particular configuration bit (mode bit #24)
+		 * is set on cpu reset, so check whether the
+		 * extra TLB are really usable.
+		 *
+		 * If they are disabled, they are nevertheless
+		 * writable, but random TLB insert operations
+		 * will never use any of them. This can be
+		 * checked by inserting dummy entries and check
+		 * if any of the last 16 entries have been used.
+		 *
+		 * Of course, due to the way the random replacement
+		 * works (hashing various parts of the TLB data,
+		 * such as address bits and ASID), not all the
+		 * available TLB will be used; we simply check
+		 * the highest valid TLB entry we can find and
+		 * see if it is in the upper 16 entries or not.
+		 */
+		bootcpu_hwinfo.tlbsize = 48;
+		if (((bootcpu_hwinfo.c0prid >> 4) & 0x0f) >= 2) {
+			struct tlb_entry te;
+			int e, lastvalid;
+
+			tlb_set_wired(0);
+			tlb_flush(64);
+			for (e = 0; e < 64 * 8; e++)
+				tlb_update(XKSSEG_BASE + ptoa(2 * e),
+				    pfn_to_pad(0) | PG_ROPAGE);
+			lastvalid = 0;
+			for (e = 0; e < 64; e++) {
+				tlb_read(e, &te);
+				if ((te.tlb_lo0 & PG_V) != 0)
+					lastvalid = e;
+			}
+			tlb_flush(64);
+			if (lastvalid >= 48)
+				bootcpu_hwinfo.tlbsize = 64;
+		}
+		break;
+#endif
+#ifdef CPU_R10000
+	case MIPS_R10000:
+	case MIPS_R12000:
+	case MIPS_R14000:
+		bootcpu_hwinfo.tlbsize = 64;
+		break;
+#endif
+	default:	/* R5000, RM52xx */
+		bootcpu_hwinfo.tlbsize = 48;
+		break;
+	}
 
 	comconsaddr = MACE_ISA_SER1_OFFS;
 	comconsfreq = 1843200;
diff --git a/sys/arch/sgi/sgi/machdep.c b/sys/arch/sgi/sgi/machdep.c
index 11015429434..b05941d6829 100644
--- a/sys/arch/sgi/sgi/machdep.c
+++ b/sys/arch/sgi/sgi/machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: machdep.c,v 1.95 2010/01/08 01:35:52 syuu Exp $ */
+/*	$OpenBSD: machdep.c,v 1.96 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2003-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -111,6 +111,7 @@ int16_t	masternasid;
 
 int32_t *environment;
 struct sys_rec sys_config;
+struct cpu_hwinfo bootcpu_hwinfo;
 
 /* Pointers to the start and end of the symbol table. */
 caddr_t	ssym;
@@ -338,87 +339,10 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 		}
 	}
 
-	switch (sys_config.system_type) {
-#if defined(TGT_O2) || defined(TGT_OCTANE)
-	case SGI_O2:
-	case SGI_OCTANE:
-		sys_config.cpu[0].type = (cp0_get_prid() >> 8) & 0xff;
-		sys_config.cpu[0].vers_maj = (cp0_get_prid() >> 4) & 0x0f;
-		sys_config.cpu[0].vers_min = cp0_get_prid() & 0x0f;
-		sys_config.cpu[0].fptype = (cp1_get_prid() >> 8) & 0xff;
-		sys_config.cpu[0].fpvers_maj = (cp1_get_prid() >> 4) & 0x0f;
-		sys_config.cpu[0].fpvers_min = cp1_get_prid() & 0x0f;
-
-		/*
-		 * Configure TLB.
-		 */
-		switch(sys_config.cpu[0].type) {
-#ifdef CPU_RM7000
-		case MIPS_RM7000:
-			/*
-			 * Rev A (version >= 2) CPU's have 64 TLB entries.
-			 *
-			 * However, the last 16 are only enabled if one
-			 * particular configuration bit (mode bit #24)
-			 * is set on cpu reset, so check whether the
-			 * extra TLB are really usable.
-			 *
-			 * If they are disabled, they are nevertheless
-			 * writable, but random TLB insert operations
-			 * will never use any of them. This can be
-			 * checked by inserting dummy entries and check
-			 * if any of the last 16 entries have been used.
-			 *
-			 * Of course, due to the way the random replacement
-			 * works (hashing various parts of the TLB data,
-			 * such as address bits and ASID), not all the
-			 * available TLB will be used; we simply check
-			 * the highest valid TLB entry we can find and
-			 * see if it is in the upper 16 entries or not.
-			 */
-			sys_config.cpu[0].tlbsize = 48;
-			if (sys_config.cpu[0].vers_maj >= 2) {
-				struct tlb_entry te;
-				int e, lastvalid;
-
-				tlb_set_wired(0);
-				tlb_flush(64);
-				for (e = 0; e < 64 * 8; e++)
-					tlb_update(XKSSEG_BASE + ptoa(2 * e),
-					    pfn_to_pad(0) | PG_ROPAGE);
-				lastvalid = 0;
-				for (e = 0; e < 64; e++) {
-					tlb_read(e, &te);
-					if ((te.tlb_lo0 & PG_V) != 0)
-						lastvalid = e;
-				}
-				tlb_flush(64);
-				if (lastvalid >= 48)
-					sys_config.cpu[0].tlbsize = 64;
-			}
-			break;
-#endif
-#ifdef CPU_R10000
-		case MIPS_R10000:
-		case MIPS_R12000:
-		case MIPS_R14000:
-			sys_config.cpu[0].tlbsize = 64;
-			break;
-#endif
-		default:
-			sys_config.cpu[0].tlbsize = 48;
-			break;
-		}
-		break;
-#endif
-	default:
-		break;
-	}
-
 	/*
 	 * Configure cache.
 	 */
-	switch(sys_config.cpu[0].type) {
+	switch (bootcpu_hwinfo.type) {
 #ifdef CPU_R10000
 	case MIPS_R10000:
 	case MIPS_R12000:
@@ -489,11 +413,10 @@ mips_init(int argc, void *argv, caddr_t boot_esym)
 	 */
 	delay(20*1000);		/* Let any UART FIFO drain... */
 
-	sys_config.cpu[0].tlbwired = UPAGES / 2;
 	tlb_set_page_mask(TLB_PAGE_MASK);
 	tlb_set_wired(0);
-	tlb_flush(sys_config.cpu[0].tlbsize);
-	tlb_set_wired(sys_config.cpu[0].tlbwired);
+	tlb_flush(bootcpu_hwinfo.tlbsize);
+	tlb_set_wired(UPAGES / 2);
 
 	/*
 	 * Get a console, very early but after initial mapping setup.
@@ -830,7 +753,7 @@ setregs(p, pack, stack, retval)
 	p->p_md.md_regs->sr = SR_FR_32 | SR_XX | SR_KSU_USER | SR_KX | SR_UX |
 	    SR_EXL | SR_INT_ENAB;
 #if defined(CPU_R10000) && !defined(TGT_COHERENT)
-	if (sys_config.cpu[0].type == MIPS_R12000)
+	if (ci->ci_hw.type == MIPS_R12000)
 		p->p_md.md_regs->sr |= SR_DSD;
 #endif
 	p->p_md.md_regs->sr |= idle_mask & SR_INT_MASK;
diff --git a/sys/arch/sgi/sgi/mainbus.c b/sys/arch/sgi/sgi/mainbus.c
index 79f3a93d780..5d8e411d0d1 100644
--- a/sys/arch/sgi/sgi/mainbus.c
+++ b/sys/arch/sgi/sgi/mainbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: mainbus.c,v 1.7 2009/11/07 18:56:55 miod Exp $ */
+/*	$OpenBSD: mainbus.c,v 1.8 2010/01/09 20:33:16 miod Exp $ */
 
 /*
  * Copyright (c) 2001-2003 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -61,7 +61,7 @@ mbmatch(struct device *parent, void *cfdata, void *aux)
 void
 mbattach(struct device *parent, struct device *self, void *aux)
 {
-	struct mainbus_attach_args maa;
+	struct cpu_attach_args caa;
 	extern char *hw_prod;
 
 	if (hw_prod != NULL)
@@ -69,8 +69,8 @@ mbattach(struct device *parent, struct device *self, void *aux)
 	printf("\n");
 
 	/*
-	 * On IP27 and IP35 system, delegate everything to the IP-specific
-	 * code.
+	 * On multiprocessor capable systems, delegate everything to the
+	 * IP-specific code.
 	 */
 	switch (sys_config.system_type) {
 #ifdef TGT_ORIGIN
@@ -94,19 +94,21 @@ mbattach(struct device *parent, struct device *self, void *aux)
 	 * discovered.
 	 */
 
-	bzero(&maa, sizeof maa);
-	maa.maa_name = "cpu";
-	config_found(self, &maa, mbprint);
-	maa.maa_name = "clock";
-	config_found(self, &maa, mbprint);
+	bzero(&caa, sizeof caa);
+	caa.caa_maa.maa_name = "cpu";
+	caa.caa_hw = &bootcpu_hwinfo;
+	config_found(self, &caa, mbprint);
+
+	caa.caa_maa.maa_name = "clock";
+	config_found(self, &caa.caa_maa, mbprint);
 
 	switch (sys_config.system_type) {
 #ifdef TGT_O2
 	case SGI_O2:
-		maa.maa_name = "macebus";
-		config_found(self, &maa, mbprint);
-		maa.maa_name = "gbe";
-		config_found(self, &maa, mbprint);
+		caa.caa_maa.maa_name = "macebus";
+		config_found(self, &caa.caa_maa, mbprint);
+		caa.caa_maa.maa_name = "gbe";
+		config_found(self, &caa.caa_maa, mbprint);
 		break;
 #endif
 	default:
diff --git a/sys/arch/sgi/sgi/sginode.c b/sys/arch/sgi/sgi/sginode.c
index 22feef77553..f44ee068294 100644
--- a/sys/arch/sgi/sgi/sginode.c
+++ b/sys/arch/sgi/sgi/sginode.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: sginode.c,v 1.15 2009/11/19 06:06:51 miod Exp $	*/
+/*	$OpenBSD: sginode.c,v 1.16 2010/01/09 20:33:16 miod Exp $	*/
 /*
  * Copyright (c) 2008, 2009 Miodrag Vallat.
  *
@@ -54,8 +54,6 @@
 #include <machine/mnode.h>
 #include <sgi/xbow/hub.h>
 
-int nextcpu = 0;
-
 void	kl_add_memory_ip27(int16_t, int16_t *, unsigned int);
 void	kl_add_memory_ip35(int16_t, int16_t *, unsigned int);
 
@@ -104,16 +102,6 @@ kl_scan_config(int nasid)
 	kl_scan_node(nasid, KLBRD_ANY, kl_first_pass_board, NULL);
 }
 
-void
-kl_scan_done()
-{
-	if (nextcpu > MAX_CPUS) {
-		bios_printf("%u processors found, increase MAX_CPUS\n",
-		    nextcpu);
-	}
-	ncpusfound = nextcpu;
-}
-
 /*
  * Callback routine for the initial enumeration (boards).
  */
@@ -137,7 +125,6 @@ kl_first_pass_board(lboard_t *boardinfo, void *arg)
 int
 kl_first_pass_comp(klinfo_t *comp, void *arg)
 {
-	struct cpuinfo *cpu;
 	klcpu_t *cpucomp;
 	klmembnk_m_t *memcomp_m;
 #ifdef DEBUG
@@ -154,22 +141,22 @@ kl_first_pass_comp(klinfo_t *comp, void *arg)
 		    cpucomp->cpu_prid, cpucomp->cpu_fpirr, cpucomp->cpu_speed,
 		    cpucomp->cpu_scachesz, cpucomp->cpu_scachespeed));
 
-		if (nextcpu < MAX_CPUS) {
-			cpu = &sys_config.cpu[nextcpu];
-			cpu->clock = cpucomp->cpu_speed * 1000000;
-			cpu->type = (cpucomp->cpu_prid >> 8) & 0xff;
-			cpu->vers_maj = (cpucomp->cpu_prid >> 4) & 0x0f;
-			cpu->vers_min = cpucomp->cpu_prid & 0x0f;
+		/*
+		 * XXX this assumes the first cpu encountered is the boot
+		 * XXX cpu.
+		 */
+		if (bootcpu_hwinfo.clock == 0) {
+			bootcpu_hwinfo.c0prid = cpucomp->cpu_prid;
 #if 0
-			cpu->fptype = (cpucomp->cpu_fpirr >> 8) & 0xff;
+			bootcpu_hwinfo.c1prid = cpucomp->cpu_fpirr;
 #else
-			cpu->fptype = cpu->type;
+			bootcpu_hwinfo.c1prid = cpucomp->cpu_prid;
 #endif
-			cpu->fpvers_maj = (cpucomp->cpu_fpirr >> 4) & 0x0f;
-			cpu->fpvers_min = cpucomp->cpu_fpirr & 0x0f;
-			cpu->tlbsize = 64;
-		}
-		nextcpu++;
+			bootcpu_hwinfo.clock = cpucomp->cpu_speed * 1000000;
+			bootcpu_hwinfo.tlbsize = 64;
+			bootcpu_hwinfo.type = (cpucomp->cpu_prid >> 8) & 0xff;
+		} else
+			ncpusfound++;
 		break;
 
 	case KLSTRUCT_MEMBNK: