diff options
| author |   brad <brad@openbsd.org> | 2008-11-07 22:52:15 +0000 |
|---|---|---|
| committer | brad <brad@openbsd.org> | 2008-11-07 22:52:15 +0000 |
| commit | c4538420dbfed575e813c20ceb7964410880b30b (patch) | |
| tree | 24fd9775be2ff6f457bd23753a81c05db8f6ed47 | |
| parent | - Set default RX coal packets to 64, so RX coal timeout takes control during (diff) | |
| download | wireguard-openbsd-c4538420dbfed575e813c20ceb7964410880b30b.tar.xz wireguard-openbsd-c4538420dbfed575e813c20ceb7964410880b30b.zip | |
When initializing the MAC put the PHY into ready state for BCM5906
chipsets.
From the Linux tg3 driver via FreeBSD.
Tested by Jordi Creix <jbcreix dot mail at gmail dot com>
| -rw-r--r-- | sys/dev/pci/if_bge.c | 11 | ||||
| -rw-r--r-- | sys/dev/pci/if_bgereg.h | 3 |
2 files changed, 12 insertions, 2 deletions
diff --git a/sys/dev/pci/if_bge.c b/sys/dev/pci/if_bge.c index d58ab8dad4b..ab229d0eaea 100644 --- a/sys/dev/pci/if_bge.c +++ b/sys/dev/pci/if_bge.c @@ -1,4 +1,4 @@ -/* $OpenBSD: if_bge.c,v 1.249 2008/10/19 08:13:01 brad Exp $ */ +/* $OpenBSD: if_bge.c,v 1.250 2008/11/07 22:52:15 brad Exp $ */ /* * Copyright (c) 2001 Wind River Systems @@ -1316,6 +1316,15 @@ bge_chipinit(struct bge_softc *sc) /* Set the timer prescaler (always 66MHz) */ CSR_WRITE_4(sc, BGE_MISC_CFG, 65 << 1/*BGE_32BITTIME_66MHZ*/); + + if (BGE_ASICREV(sc->bge_chipid) == BGE_ASICREV_BCM5906) { + DELAY(40); /* XXX */ + + /* Put PHY into ready state */ + BGE_CLRBIT(sc, BGE_MISC_CFG, BGE_MISCCFG_EPHY_IDDQ); + CSR_READ_4(sc, BGE_MISC_CFG); /* Flush */ + DELAY(40); + } } int diff --git a/sys/dev/pci/if_bgereg.h b/sys/dev/pci/if_bgereg.h index 8f2571d8929..153b3165ea5 100644 --- a/sys/dev/pci/if_bgereg.h +++ b/sys/dev/pci/if_bgereg.h @@ -1,4 +1,4 @@ -/* $OpenBSD: if_bgereg.h,v 1.85 2008/07/17 19:59:44 brad Exp $ */ +/* $OpenBSD: if_bgereg.h,v 1.86 2008/11/07 22:53:31 brad Exp $ */ /* * Copyright (c) 2001 Wind River Systems @@ -1805,6 +1805,7 @@ #define BGE_MISCCFG_BOARD_ID_5788 0x00010000 #define BGE_MISCCFG_BOARD_ID_5788M 0x00018000 #define BGE_MISCCFG_BOARD_ID_MASK 0x0001e000 +#define BGE_MISCCFG_EPHY_IDDQ 0x00200000 #define BGE_MISCCFG_KEEP_GPHY_POWER 0x04000000 #define BGE_32BITTIME_66MHZ (0x41 << 1) |