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| author | 2003-07-14 00:45:20 +0000 | |
|---|---|---|
| committer | 2003-07-14 00:45:20 +0000 | |
| commit | c9c5b9d2d52d6861b291f3e5d4e446eb3e8bcbcc (patch) | |
| tree | cd49224d215c665a2e13a694e125d405e2bae629 | |
| parent | cleaning and undef DEBUG_EMUL (diff) | |
| download | wireguard-openbsd-c9c5b9d2d52d6861b291f3e5d4e446eb3e8bcbcc.tar.xz wireguard-openbsd-c9c5b9d2d52d6861b291f3e5d4e446eb3e8bcbcc.zip | |
i_loadstore is missing the rs1 decode which shifts the i_i bits and i_simm13
left 5 bits. Luckily this isn't used except for debug code.
| -rw-r--r-- | sys/arch/sparc/include/instr.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/arch/sparc/include/instr.h b/sys/arch/sparc/include/instr.h index 1c855d24e99..460dee6d254 100644 --- a/sys/arch/sparc/include/instr.h +++ b/sys/arch/sparc/include/instr.h @@ -1,4 +1,4 @@ -/* $OpenBSD: instr.h,v 1.3 2003/06/02 23:27:54 millert Exp $ */ +/* $OpenBSD: instr.h,v 1.4 2003/07/14 00:45:20 jason Exp $ */ /* $NetBSD: instr.h,v 1.3 1997/03/14 23:54:07 christos Exp $ */ /* @@ -219,6 +219,7 @@ union instr { u_int :2; /* 11 only */ u_int i_rd:5; /* destination register */ u_int i_op3:6; /* second-level decode (see IOP3_mem) */ + u_int i_rs1:5; /* source register 1 */ u_int i_i:1; /* immediate vs asi */ u_int i_low13:13; /* depend on i bit */ } i_loadstore; |
