diff options
author | 2019-09-29 04:28:52 +0000 | |
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committer | 2019-09-29 04:28:52 +0000 | |
commit | cc838d97aaec1c6b8cf2b415d1658aef6375bbc8 (patch) | |
tree | 7e94df3e5a5560fc90da9138a2326c8cd0c7d7e4 | |
parent | Reserve a few GPIO_CONFIG bits for machine-dependent use. (diff) | |
download | wireguard-openbsd-cc838d97aaec1c6b8cf2b415d1658aef6375bbc8.tar.xz wireguard-openbsd-cc838d97aaec1c6b8cf2b415d1658aef6375bbc8.zip |
Add option to configure GPIO output select.
-rw-r--r-- | sys/arch/octeon/dev/octgpio.c | 25 | ||||
-rw-r--r-- | sys/arch/octeon/include/octeonvar.h | 6 |
2 files changed, 26 insertions, 5 deletions
diff --git a/sys/arch/octeon/dev/octgpio.c b/sys/arch/octeon/dev/octgpio.c index 83bb314ddc1..4bb2e017db1 100644 --- a/sys/arch/octeon/dev/octgpio.c +++ b/sys/arch/octeon/dev/octgpio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: octgpio.c,v 1.1 2019/01/12 16:59:38 visa Exp $ */ +/* $OpenBSD: octgpio.c,v 1.2 2019/09/29 04:28:52 visa Exp $ */ /* * Copyright (c) 2019 Visa Hankala @@ -30,9 +30,12 @@ #include <dev/ofw/openfirm.h> #include <machine/fdt.h> +#include <machine/octeonvar.h> #include <machine/octeon_model.h> #define GPIO_BIT_CFG(x) (0x0000u + (x) * 8) +#define GPIO_BIT_CFG_OUTPUT_SEL_M 0x00000000001f0000ull +#define GPIO_BIT_CFG_OUTPUT_SEL_S 16 #define GPIO_BIT_CFG_INT_EN 0x0000000000000004ull #define GPIO_BIT_CFG_RX_XOR 0x0000000000000002ull #define GPIO_BIT_CFG_TX_OE 0x0000000000000001ull @@ -136,7 +139,7 @@ void octgpio_config_pin(void *cookie, uint32_t *cells, int config) { struct octgpio_softc *sc = cookie; - uint64_t reg, value; + uint64_t output_sel, reg, value; uint32_t pin = cells[0]; if (pin >= sc->sc_npins) @@ -147,9 +150,23 @@ octgpio_config_pin(void *cookie, uint32_t *cells, int config) reg = GPIO_BIT_CFG(pin); value = GPIO_RD_8(sc, reg); - if (config & GPIO_CONFIG_OUTPUT) + if (config & GPIO_CONFIG_OUTPUT) { value |= GPIO_BIT_CFG_TX_OE; - else + + switch (config & GPIO_CONFIG_MD_OUTPUT_SEL_MASK) { + case GPIO_CONFIG_MD_USB0_VBUS_CTRL: + output_sel = 0x14; + break; + case GPIO_CONFIG_MD_USB1_VBUS_CTRL: + output_sel = 0x19; + break; + default: + output_sel = 0; + break; + } + value &= ~GPIO_BIT_CFG_OUTPUT_SEL_M; + value |= output_sel << GPIO_BIT_CFG_OUTPUT_SEL_S; + } else value &= ~(GPIO_BIT_CFG_TX_OE | GPIO_BIT_CFG_RX_XOR); /* There is no INT_EN bit on true XBIT pins. */ value &= ~GPIO_BIT_CFG_INT_EN; diff --git a/sys/arch/octeon/include/octeonvar.h b/sys/arch/octeon/include/octeonvar.h index 1e2c221dd02..39b70cfb974 100644 --- a/sys/arch/octeon/include/octeonvar.h +++ b/sys/arch/octeon/include/octeonvar.h @@ -1,4 +1,4 @@ -/* $OpenBSD: octeonvar.h,v 1.46 2019/07/17 14:36:32 visa Exp $ */ +/* $OpenBSD: octeonvar.h,v 1.47 2019/09/29 04:28:52 visa Exp $ */ /* $NetBSD: maltavar.h,v 1.3 2002/03/18 10:10:16 simonb Exp $ */ /*- @@ -75,6 +75,10 @@ struct octeon_config { bus_dma_tag_t mc_bootbus_dmat; }; +#define GPIO_CONFIG_MD_OUTPUT_SEL_MASK (GPIO_CONFIG_MD0 | GPIO_CONFIG_MD1) +#define GPIO_CONFIG_MD_USB0_VBUS_CTRL GPIO_CONFIG_MD0 +#define GPIO_CONFIG_MD_USB1_VBUS_CTRL GPIO_CONFIG_MD1 + /* * FPA map */ |