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| author |   guenther <guenther@openbsd.org> | 2019-04-23 06:51:04 +0000 |
|---|---|---|
| committer | guenther <guenther@openbsd.org> | 2019-04-23 06:51:04 +0000 |
| commit | d488f48906e525f8056990d75df30f6f64ce9212 (patch) | |
| tree | 2864f0bb3be6610fb313381c7736e0905419c437 | |
| parent | whitespace fix (diff) | |
| download | wireguard-openbsd-d488f48906e525f8056990d75df30f6f64ce9212.tar.xz wireguard-openbsd-d488f48906e525f8056990d75df30f6f64ce9212.zip | |
Copy cache-control bits from U+K to U-K entry in pmap_enter_special()
in a generic way, correcting the handling of the LAPIC page.
ok mlarkin@
| -rw-r--r-- | sys/arch/amd64/amd64/lapic.c | 3 | ||||
| -rw-r--r-- | sys/arch/amd64/amd64/pmap.c | 7 |
2 files changed, 5 insertions, 5 deletions
diff --git a/sys/arch/amd64/amd64/lapic.c b/sys/arch/amd64/amd64/lapic.c index 8643073023b..780ca0f7781 100644 --- a/sys/arch/amd64/amd64/lapic.c +++ b/sys/arch/amd64/amd64/lapic.c @@ -1,4 +1,4 @@ -/* $OpenBSD: lapic.c,v 1.53 2018/10/04 05:00:40 guenther Exp $ */ +/* $OpenBSD: lapic.c,v 1.54 2019/04/23 06:51:04 guenther Exp $ */ /* $NetBSD: lapic.c,v 1.2 2003/05/08 01:04:35 fvdl Exp $ */ /*- @@ -235,7 +235,6 @@ lapic_map(paddr_t lapic_base) * Meltdown (needed in the interrupt stub to acknowledge the * incoming interrupt). On CPUs unaffected by Meltdown, * pmap_enter_special is a no-op. - * XXX - need to map this PG_N */ pmap_enter_special(va, lapic_base, PROT_READ | PROT_WRITE); DPRINTF("%s: entered lapic page va 0x%llx pa 0x%llx\n", __func__, diff --git a/sys/arch/amd64/amd64/pmap.c b/sys/arch/amd64/amd64/pmap.c index 436e8ced6e1..9d6f655b7ab 100644 --- a/sys/arch/amd64/amd64/pmap.c +++ b/sys/arch/amd64/amd64/pmap.c @@ -1,4 +1,4 @@ -/* $OpenBSD: pmap.c,v 1.130 2019/04/01 12:45:50 mlarkin Exp $ */ +/* $OpenBSD: pmap.c,v 1.131 2019/04/23 06:51:04 guenther Exp $ */ /* $NetBSD: pmap.c,v 1.3 2003/05/08 18:13:13 thorpej Exp $ */ /* @@ -2279,12 +2279,13 @@ pmap_enter_special(vaddr_t va, paddr_t pa, vm_prot_t prot) /* * Look up the corresponding U+K entry. If we're installing the - * same PA into the U-K map then set the PG_G bit on both + * same PA into the U-K map then set the PG_G bit on both and copy + * the cache-control bits from the U+K entry to the U-K entry. */ level = pmap_find_pte_direct(pmap, va, &ptes, &offs); if (__predict_true(level == 0 && pmap_valid_entry(ptes[offs]))) { if (((pd[l1idx] ^ ptes[offs]) & PG_FRAME) == 0) { - pd[l1idx] |= PG_G; + pd[l1idx] |= PG_G | (ptes[offs] & (PG_N | PG_WT)); ptes[offs] |= PG_G; } else { DPRINTF("%s: special diffing mapping at %llx\n", |