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authordownsj <downsj@openbsd.org>1999-11-28 12:07:02 +0000
committerdownsj <downsj@openbsd.org>1999-11-28 12:07:02 +0000
commitf942129f9db4c02cc746cde7776f9a721aae4862 (patch)
tree5186b6457885f046f4d674ab06a341ae0af4101c
parentAdd lpt at puc. (diff)
downloadwireguard-openbsd-f942129f9db4c02cc746cde7776f9a721aae4862.tar.xz
wireguard-openbsd-f942129f9db4c02cc746cde7776f9a721aae4862.zip
Enable TI16750 UART support.
-rw-r--r--sys/arch/i386/isa/pccom.c22
1 files changed, 3 insertions, 19 deletions
diff --git a/sys/arch/i386/isa/pccom.c b/sys/arch/i386/isa/pccom.c
index 2ed0b312cde..672388303fb 100644
--- a/sys/arch/i386/isa/pccom.c
+++ b/sys/arch/i386/isa/pccom.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccom.c,v 1.33 1999/10/26 12:29:00 downsj Exp $ */
+/* $OpenBSD: pccom.c,v 1.34 1999/11/28 12:07:02 downsj Exp $ */
/* $NetBSD: com.c,v 1.82.4.1 1996/06/02 09:08:00 mrg Exp $ */
/*
@@ -540,19 +540,19 @@ comattach(parent, self, aux)
bus_space_write_1(iot, ioh, com_dlbh, dlbh);
}
-#ifdef notyet
if (sc->sc_uarttype == COM_UART_16550A) { /* Probe for TI16750s */
bus_space_write_1(iot, ioh, com_lcr, lcr | LCR_DLAB);
bus_space_write_1(iot, ioh, com_fifo,
FIFO_ENABLE | FIFO_ENABLE_64BYTE);
if ((bus_space_read_1(iot, ioh, com_iir) >> 5) == 7) {
+#if 0
bus_space_write_1(iot, ioh, com_lcr, 0);
if ((bus_space_read_1(iot, ioh, com_iir) >> 5) == 6)
+#endif
sc->sc_uarttype = COM_UART_TI16750;
}
bus_space_write_1(iot, ioh, com_fifo, FIFO_ENABLE);
}
-#endif
/* Reset the LCR (latch access is probably enabled). */
bus_space_write_1(iot, ioh, com_lcr, lcr);
@@ -600,13 +600,11 @@ comattach(parent, self, aux)
SET(sc->sc_hwflags, COM_HW_FIFO);
sc->sc_fifolen = 32;
break;
-#ifdef notyet
case COM_UART_TI16750:
printf(": ti16750, 64 byte fifo\n");
SET(sc->sc_hwflags, COM_HW_FIFO);
sc->sc_fifolen = 64;
break;
-#endif
case COM_UART_XR16850:
printf(": xr16850 (rev %d), 128 byte fifo\n", sc->sc_uartrev);
SET(sc->sc_hwflags, COM_HW_FIFO);
@@ -818,11 +816,9 @@ comopen(dev, flag, mode, p)
bus_space_write_1(iot, ioh, com_efr, 0);
bus_space_write_1(iot, ioh, com_lcr, 0);
break;
-#ifdef notyet
case COM_UART_TI16750:
bus_space_write_1(iot, ioh, com_ier, 0);
break;
-#endif
}
#ifdef COM_HAYESP
@@ -875,13 +871,11 @@ comopen(dev, flag, mode, p)
else
fifo |= FIFO_RCV3_TRIGGER_60|FIFO_XMT3_TRIGGER_56;
break;
-#ifdef notyet
case COM_UART_TI16750:
fifo |= FIFO_ENABLE_64BYTE;
lcr = bus_space_read_1(iot, ioh, com_lcr);
bus_space_write_1(iot, ioh, com_lcr,
lcr | LCR_DLAB);
-#endif
default:
if (tp->t_ispeed <= 1200)
fifo |= FIFO_TRIGGER_1;
@@ -911,10 +905,8 @@ comopen(dev, flag, mode, p)
com_lsr), LSR_RXRDY))
break;
}
-#ifndef notyet
if (sc->sc_uarttype == COM_UART_TI16750)
bus_space_write_1(iot, ioh, com_lcr, lcr);
-#endif
}
/* flush any pending I/O */
@@ -1058,11 +1050,9 @@ compwroff(sc)
bus_space_write_1(iot, ioh, com_ier, IER_SLEEP);
bus_space_write_1(iot, ioh, com_lcr, 0);
break;
-#ifdef notyet
case COM_UART_TI16750:
bus_space_write_1(iot, ioh, com_ier, IER_SLEEP);
break;
-#endif
}
}
@@ -1331,9 +1321,7 @@ comparam(tp, t)
if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP) &&
ISSET(sc->sc_hwflags, COM_HW_FIFO)) {
u_int8_t fifo = FIFO_ENABLE;
-#ifdef notyet
u_int8_t lcr2;
-#endif
switch (sc->sc_uarttype) {
case COM_UART_ST16650V2:
@@ -1348,13 +1336,11 @@ comparam(tp, t)
else
fifo |= FIFO_RCV3_TRIGGER_60|FIFO_XMT3_TRIGGER_56;
break;
-#ifdef notyet
case COM_UART_TI16750:
fifo |= FIFO_ENABLE_64BYTE;
lcr2 = bus_space_read_1(iot, ioh, com_lcr);
bus_space_write_1(iot, ioh, com_lcr,
lcr2 | LCR_DLAB);
-#endif
default:
if (t->c_ispeed <= 1200)
fifo |= FIFO_TRIGGER_1;
@@ -1363,10 +1349,8 @@ comparam(tp, t)
}
bus_space_write_1(iot, ioh, com_fifo, fifo);
-#ifdef notyet
if (sc->sc_uarttype == COM_UART_TI16750)
bus_space_write_1(iot, ioh, com_lcr, lcr2);
-#endif
}
} else
bus_space_write_1(iot, ioh, com_lcr, lcr);