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author | 2019-05-09 19:56:18 +0000 | |
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committer | 2019-05-09 19:56:18 +0000 | |
commit | fc75e294649dad6e15929166e2a3434ca6573fe2 (patch) | |
tree | 7701939829242ccda9d7cd6c4a1bfb6aa2dd6536 | |
parent | Measure poll interval with monotonic clock. ok jcs@ (diff) | |
download | wireguard-openbsd-fc75e294649dad6e15929166e2a3434ca6573fe2.tar.xz wireguard-openbsd-fc75e294649dad6e15929166e2a3434ca6573fe2.zip |
set up IFP using the gen3 path on pineview
Avoids crashes on boot with pineview on chipset flush due to IFP not
being initialised.
Diagnosed by, tested by and ok ratchov@ ok kettenis@
-rw-r--r-- | sys/dev/pci/drm/i915/intel_gtt.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/sys/dev/pci/drm/i915/intel_gtt.c b/sys/dev/pci/drm/i915/intel_gtt.c index 5bd6a74f4fe..e6e1bfff9c6 100644 --- a/sys/dev/pci/drm/i915/intel_gtt.c +++ b/sys/dev/pci/drm/i915/intel_gtt.c @@ -130,11 +130,10 @@ intel_gtt_chipset_setup(struct drm_device *dev) } /* Set up the IFP for chipset flushing */ - if (IS_I915G(dev_priv) || IS_I915GM(dev_priv) || IS_I945G(dev_priv) || - IS_I945GM(dev_priv)) { - i915_alloc_ifp(dev_priv, &bpa); - } else if (INTEL_GEN(dev_priv) >= 4 || IS_G33(dev_priv)) { + if (INTEL_GEN(dev_priv) >= 4 || IS_G33(dev_priv)) { i965_alloc_ifp(dev_priv, &bpa); + } else if (INTEL_GEN(dev_priv) == 3) { + i915_alloc_ifp(dev_priv, &bpa); } else { int nsegs; /* |