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| author | 2017-12-24 23:15:17 +0000 | |
|---|---|---|
| committer | 2017-12-24 23:15:17 +0000 | |
| commit | 34091ed6d5747c7d4acdc1ef6af75ce9b7a8adba (patch) | |
| tree | 53479f738fa2c63ce6cf95113985510e3653de23 /gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp | |
| parent | Consolidate printf(3) calls at the end of main(). (diff) | |
| download | wireguard-openbsd-34091ed6d5747c7d4acdc1ef6af75ce9b7a8adba.tar.xz wireguard-openbsd-34091ed6d5747c7d4acdc1ef6af75ce9b7a8adba.zip | |
Import LLVM 5.0.1 release including clang, lld and lldb.
Diffstat (limited to 'gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp')
| -rw-r--r-- | gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp index 9a92ee279cd..be06053f004 100644 --- a/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -601,3 +601,21 @@ void MachineRegisterInfo::setCalleeSavedRegs(ArrayRef<MCPhysReg> CSRs) { UpdatedCSRs.push_back(0); IsUpdatedCSRsInitialized = true; } + +bool MachineRegisterInfo::isReservedRegUnit(unsigned Unit) const { + const TargetRegisterInfo *TRI = getTargetRegisterInfo(); + for (MCRegUnitRootIterator Root(Unit, TRI); Root.isValid(); ++Root) { + bool IsRootReserved = true; + for (MCSuperRegIterator Super(*Root, TRI, /*IncludeSelf=*/true); + Super.isValid(); ++Super) { + unsigned Reg = *Super; + if (!isReserved(Reg)) { + IsRootReserved = false; + break; + } + } + if (IsRootReserved) + return true; + } + return false; +} |
