diff options
| author |   patrick <patrick@openbsd.org> | 2019-01-27 16:42:12 +0000 |
|---|---|---|
| committer | patrick <patrick@openbsd.org> | 2019-01-27 16:42:12 +0000 |
| commit | b773203fb58f3ef282fb69c832d8710cab5bc82d (patch) | |
| tree | e75913f147570fbd75169647b144df85b88a038c /gnu/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp | |
| parent | tweak errno in previous (diff) | |
| download | wireguard-openbsd-b773203fb58f3ef282fb69c832d8710cab5bc82d.tar.xz wireguard-openbsd-b773203fb58f3ef282fb69c832d8710cab5bc82d.zip | |
Import LLVM 7.0.1 release including clang, lld and lldb.
Diffstat (limited to 'gnu/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp')
| -rw-r--r-- | gnu/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gnu/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp b/gnu/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp index f878bf9937a..d5dacbe0877 100644 --- a/gnu/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp +++ b/gnu/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp @@ -37,7 +37,7 @@ ARMHazardRecognizer::getHazardType(SUnit *SU, int Stalls) { MachineInstr *MI = SU->getInstr(); - if (!MI->isDebugValue()) { + if (!MI->isDebugInstr()) { // Look for special VMLA / VMLS hazards. A VMUL / VADD / VSUB following // a VMLA / VMLS will cause 4 cycle stall. const MCInstrDesc &MCID = MI->getDesc(); @@ -81,7 +81,7 @@ void ARMHazardRecognizer::Reset() { void ARMHazardRecognizer::EmitInstruction(SUnit *SU) { MachineInstr *MI = SU->getInstr(); - if (!MI->isDebugValue()) { + if (!MI->isDebugInstr()) { LastMI = MI; FpMLxStalls = 0; } |