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| author |   patrick <patrick@openbsd.org> | 2017-01-24 08:32:59 +0000 |
|---|---|---|
| committer | patrick <patrick@openbsd.org> | 2017-01-24 08:32:59 +0000 |
| commit | 53d771aafdbe5b919f264f53cba3788e2c4cffd2 (patch) | |
| tree | 7eca39498be0ff1e3a6daf583cd9ca5886bb2636 /gnu/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | |
| parent | In preparation of compiling our kernels with -ffreestanding, explicitly map (diff) | |
| download | wireguard-openbsd-53d771aafdbe5b919f264f53cba3788e2c4cffd2.tar.xz wireguard-openbsd-53d771aafdbe5b919f264f53cba3788e2c4cffd2.zip | |
Import LLVM 4.0.0 rc1 including clang and lld to help the current
development effort on OpenBSD/arm64.
Diffstat (limited to 'gnu/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp')
| -rw-r--r-- | gnu/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/gnu/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/gnu/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp index 3196a57ccc3..ac3d8c780af 100644 --- a/gnu/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp +++ b/gnu/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp @@ -861,13 +861,13 @@ DecodeStatus ThumbDisassembler::getInstruction(MCInst &MI, uint64_t &Size, extern "C" void LLVMInitializeARMDisassembler() { - TargetRegistry::RegisterMCDisassembler(TheARMLETarget, + TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(), createARMDisassembler); - TargetRegistry::RegisterMCDisassembler(TheARMBETarget, + TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(), createARMDisassembler); - TargetRegistry::RegisterMCDisassembler(TheThumbLETarget, + TargetRegistry::RegisterMCDisassembler(getTheThumbLETarget(), createThumbDisassembler); - TargetRegistry::RegisterMCDisassembler(TheThumbBETarget, + TargetRegistry::RegisterMCDisassembler(getTheThumbBETarget(), createThumbDisassembler); } @@ -1432,7 +1432,7 @@ static DecodeStatus DecodeCopMemInstruction(MCInst &Inst, unsigned Insn, case ARM::STC_POST: case ARM::STCL_POST: imm |= U << 8; - // fall through. + LLVM_FALLTHROUGH; default: // The 'option' variant doesn't encode 'U' in the immediate since // the immediate is unsigned [0,255]. @@ -2555,6 +2555,7 @@ static DecodeStatus DecodeVLDInstruction(MCInst &Inst, unsigned Insn, break; } // Fall through to handle the register offset variant. + LLVM_FALLTHROUGH; case ARM::VLD1d8wb_fixed: case ARM::VLD1d16wb_fixed: case ARM::VLD1d32wb_fixed: @@ -4157,7 +4158,7 @@ static DecodeStatus DecodeMSRMask(MCInst &Inst, unsigned Val, case 0x93: // faultmask_ns if (!(FeatureBits[ARM::HasV8MMainlineOps])) return MCDisassembler::Fail; - // fall through + LLVM_FALLTHROUGH; case 10: // msplim case 11: // psplim case 0x88: // msp_ns @@ -5310,4 +5311,3 @@ static DecodeStatus DecoderForMRRC2AndMCRR2(llvm::MCInst &Inst, unsigned Val, return S; } - |