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| author |   patrick <patrick@openbsd.org> | 2017-01-14 19:55:43 +0000 |
|---|---|---|
| committer | patrick <patrick@openbsd.org> | 2017-01-14 19:55:43 +0000 |
| commit | bd3306aecb3a15e8967143b8cdbbccf2b1b19b74 (patch) | |
| tree | 309a8132b44564b9e634c0da6815187ce8eab27c /gnu/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | |
| parent | killp -a should not kill the window if only one pane. (diff) | |
| download | wireguard-openbsd-bd3306aecb3a15e8967143b8cdbbccf2b1b19b74.tar.xz wireguard-openbsd-bd3306aecb3a15e8967143b8cdbbccf2b1b19b74.zip | |
Import LLVM 3.9.1 including clang and lld.
Diffstat (limited to 'gnu/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp')
| -rw-r--r-- | gnu/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/gnu/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp b/gnu/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp index bf0498dfda6..0c705555163 100644 --- a/gnu/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ b/gnu/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -36,6 +36,11 @@ namespace { bool runOnMachineFunction(MachineFunction &Fn) override; + MachineFunctionProperties getRequiredProperties() const override { + return MachineFunctionProperties().set( + MachineFunctionProperties::Property::AllVRegsAllocated); + } + const char *getPassName() const override { return "Thumb IT blocks insertion pass"; } @@ -165,7 +170,7 @@ Thumb2ITBlockPass::MoveCopyOutOfITBlock(MachineInstr *MI, ++I; if (I != E) { unsigned NPredReg = 0; - ARMCC::CondCodes NCC = getITInstrPredicate(I, NPredReg); + ARMCC::CondCodes NCC = getITInstrPredicate(*I, NPredReg); if (NCC == CC || NCC == OCC) return true; } @@ -182,7 +187,7 @@ bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) { MachineInstr *MI = &*MBBI; DebugLoc dl = MI->getDebugLoc(); unsigned PredReg = 0; - ARMCC::CondCodes CC = getITInstrPredicate(MI, PredReg); + ARMCC::CondCodes CC = getITInstrPredicate(*MI, PredReg); if (CC == ARMCC::AL) { ++MBBI; continue; @@ -222,7 +227,7 @@ bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) { MI = NMI; unsigned NPredReg = 0; - ARMCC::CondCodes NCC = getITInstrPredicate(NMI, NPredReg); + ARMCC::CondCodes NCC = getITInstrPredicate(*NMI, NPredReg); if (NCC == CC || NCC == OCC) { Mask |= (NCC & 1) << Pos; // Add implicit use of ITSTATE. |