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| author | 2020-08-03 15:06:44 +0000 | |
|---|---|---|
| committer | 2020-08-03 15:06:44 +0000 | |
| commit | b64793999546ed8adebaeebd9d8345d18db8927d (patch) | |
| tree | 4357c27b561d73b0e089727c6ed659f2ceff5f47 /gnu/llvm/lib/Target/AVR/AVRTargetMachine.cpp | |
| parent | Add support for UTF-8 DISPLAY-HINTs with octet length. For now only (diff) | |
| download | wireguard-openbsd-b64793999546ed8adebaeebd9d8345d18db8927d.tar.xz wireguard-openbsd-b64793999546ed8adebaeebd9d8345d18db8927d.zip | |
Remove LLVM 8.0.1 files.
Diffstat (limited to 'gnu/llvm/lib/Target/AVR/AVRTargetMachine.cpp')
| -rw-r--r-- | gnu/llvm/lib/Target/AVR/AVRTargetMachine.cpp | 124 |
1 files changed, 0 insertions, 124 deletions
diff --git a/gnu/llvm/lib/Target/AVR/AVRTargetMachine.cpp b/gnu/llvm/lib/Target/AVR/AVRTargetMachine.cpp deleted file mode 100644 index 9828cdab68c..00000000000 --- a/gnu/llvm/lib/Target/AVR/AVRTargetMachine.cpp +++ /dev/null @@ -1,124 +0,0 @@ -//===-- AVRTargetMachine.cpp - Define TargetMachine for AVR ---------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This file defines the AVR specific subclass of TargetMachine. -// -//===----------------------------------------------------------------------===// - -#include "AVRTargetMachine.h" - -#include "llvm/CodeGen/Passes.h" -#include "llvm/CodeGen/TargetPassConfig.h" -#include "llvm/IR/LegacyPassManager.h" -#include "llvm/IR/Module.h" -#include "llvm/Support/TargetRegistry.h" - -#include "AVR.h" -#include "AVRTargetObjectFile.h" -#include "MCTargetDesc/AVRMCTargetDesc.h" - -namespace llvm { - -static const char *AVRDataLayout = "e-P1-p:16:8-i8:8-i16:8-i32:8-i64:8-f32:8-f64:8-n8-a:8"; - -/// Processes a CPU name. -static StringRef getCPU(StringRef CPU) { - if (CPU.empty() || CPU == "generic") { - return "avr2"; - } - - return CPU; -} - -static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) { - return RM.hasValue() ? *RM : Reloc::Static; -} - -AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT, - StringRef CPU, StringRef FS, - const TargetOptions &Options, - Optional<Reloc::Model> RM, - Optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT) - : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, - getEffectiveRelocModel(RM), - getEffectiveCodeModel(CM, CodeModel::Small), OL), - SubTarget(TT, getCPU(CPU), FS, *this) { - this->TLOF = make_unique<AVRTargetObjectFile>(); - initAsmInfo(); -} - -namespace { -/// AVR Code Generator Pass Configuration Options. -class AVRPassConfig : public TargetPassConfig { -public: - AVRPassConfig(AVRTargetMachine &TM, PassManagerBase &PM) - : TargetPassConfig(TM, PM) {} - - AVRTargetMachine &getAVRTargetMachine() const { - return getTM<AVRTargetMachine>(); - } - - bool addInstSelector() override; - void addPreSched2() override; - void addPreEmitPass() override; - void addPreRegAlloc() override; -}; -} // namespace - -TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) { - return new AVRPassConfig(*this, PM); -} - -extern "C" void LLVMInitializeAVRTarget() { - // Register the target. - RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget()); - - auto &PR = *PassRegistry::getPassRegistry(); - initializeAVRExpandPseudoPass(PR); - initializeAVRRelaxMemPass(PR); -} - -const AVRSubtarget *AVRTargetMachine::getSubtargetImpl() const { - return &SubTarget; -} - -const AVRSubtarget *AVRTargetMachine::getSubtargetImpl(const Function &) const { - return &SubTarget; -} - -//===----------------------------------------------------------------------===// -// Pass Pipeline Configuration -//===----------------------------------------------------------------------===// - -bool AVRPassConfig::addInstSelector() { - // Install an instruction selector. - addPass(createAVRISelDag(getAVRTargetMachine(), getOptLevel())); - // Create the frame analyzer pass used by the PEI pass. - addPass(createAVRFrameAnalyzerPass()); - - return false; -} - -void AVRPassConfig::addPreRegAlloc() { - // Create the dynalloc SP save/restore pass to handle variable sized allocas. - addPass(createAVRDynAllocaSRPass()); -} - -void AVRPassConfig::addPreSched2() { - addPass(createAVRRelaxMemPass()); - addPass(createAVRExpandPseudoPass()); -} - -void AVRPassConfig::addPreEmitPass() { - // Must run branch selection immediately preceding the asm printer. - addPass(&BranchRelaxationPassID); -} - -} // end of namespace llvm |
