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| author | 2017-10-04 20:27:34 +0000 | |
|---|---|---|
| committer | 2017-10-04 20:27:34 +0000 | |
| commit | 31eb748944903b7f4f38afda9851951ca9dfc1ae (patch) | |
| tree | 9b95b6ea45d0874d75eb05b90c0840e191416439 /gnu/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | |
| parent | Don't try to handle IPv4-compatible IPv6 addresses (diff) | |
| download | wireguard-openbsd-31eb748944903b7f4f38afda9851951ca9dfc1ae.tar.xz wireguard-openbsd-31eb748944903b7f4f38afda9851951ca9dfc1ae.zip | |
Import LLVM 5.0.0 release including clang, lld and lldb.
Diffstat (limited to 'gnu/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp')
| -rw-r--r-- | gnu/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/gnu/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/gnu/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 6a7f75a6b3a..814377003cb 100644 --- a/gnu/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/gnu/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -84,8 +84,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( ISD::SETULT, ISD::SETULE, ISD::SETUGT, ISD::SETUGE}) setCondCodeAction(CC, T, Expand); // Expand floating-point library function operators. - for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOWI, ISD::FPOW, - ISD::FREM, ISD::FMA}) + for (auto Op : {ISD::FSIN, ISD::FCOS, ISD::FSINCOS, ISD::FPOW, ISD::FREM, + ISD::FMA}) setOperationAction(Op, T, Expand); // Note supported floating-point library function operators that otherwise // default to expand. @@ -95,6 +95,11 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( // Support minnan and maxnan, which otherwise default to expand. setOperationAction(ISD::FMINNAN, T, Legal); setOperationAction(ISD::FMAXNAN, T, Legal); + // WebAssembly currently has no builtin f16 support. + setOperationAction(ISD::FP16_TO_FP, T, Expand); + setOperationAction(ISD::FP_TO_FP16, T, Expand); + setLoadExtAction(ISD::EXTLOAD, T, MVT::f16, Expand); + setTruncStoreAction(T, MVT::f16, Expand); } for (auto T : {MVT::i32, MVT::i64}) { @@ -253,7 +258,8 @@ bool WebAssemblyTargetLowering::allowsMisalignedMemoryAccesses( return true; } -bool WebAssemblyTargetLowering::isIntDivCheap(EVT VT, AttributeSet Attr) const { +bool WebAssemblyTargetLowering::isIntDivCheap(EVT VT, + AttributeList Attr) const { // The current thinking is that wasm engines will perform this optimization, // so we can save on code size. return true; |
