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| author | 2020-08-03 15:06:44 +0000 | |
|---|---|---|
| committer | 2020-08-03 15:06:44 +0000 | |
| commit | b64793999546ed8adebaeebd9d8345d18db8927d (patch) | |
| tree | 4357c27b561d73b0e089727c6ed659f2ceff5f47 /gnu/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp | |
| parent | Add support for UTF-8 DISPLAY-HINTs with octet length. For now only (diff) | |
| download | wireguard-openbsd-b64793999546ed8adebaeebd9d8345d18db8927d.tar.xz wireguard-openbsd-b64793999546ed8adebaeebd9d8345d18db8927d.zip | |
Remove LLVM 8.0.1 files.
Diffstat (limited to 'gnu/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp')
| -rw-r--r-- | gnu/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp | 83 |
1 files changed, 0 insertions, 83 deletions
diff --git a/gnu/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp b/gnu/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp deleted file mode 100644 index 4a2777cc3a9..00000000000 --- a/gnu/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp +++ /dev/null @@ -1,83 +0,0 @@ -//===-- WebAssemblyTargetTransformInfo.cpp - WebAssembly-specific TTI -----===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -/// -/// \file -/// This file defines the WebAssembly-specific TargetTransformInfo -/// implementation. -/// -//===----------------------------------------------------------------------===// - -#include "WebAssemblyTargetTransformInfo.h" -#include "llvm/CodeGen/CostTable.h" -#include "llvm/Support/Debug.h" -using namespace llvm; - -#define DEBUG_TYPE "wasmtti" - -TargetTransformInfo::PopcntSupportKind -WebAssemblyTTIImpl::getPopcntSupport(unsigned TyWidth) const { - assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2"); - return TargetTransformInfo::PSK_FastHardware; -} - -unsigned WebAssemblyTTIImpl::getNumberOfRegisters(bool Vector) { - unsigned Result = BaseT::getNumberOfRegisters(Vector); - - // For SIMD, use at least 16 registers, as a rough guess. - if (Vector) - Result = std::max(Result, 16u); - - return Result; -} - -unsigned WebAssemblyTTIImpl::getRegisterBitWidth(bool Vector) const { - if (Vector && getST()->hasSIMD128()) - return 128; - - return 64; -} - -unsigned WebAssemblyTTIImpl::getArithmeticInstrCost( - unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info, - TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo, - TTI::OperandValueProperties Opd2PropInfo, ArrayRef<const Value *> Args) { - - unsigned Cost = BasicTTIImplBase<WebAssemblyTTIImpl>::getArithmeticInstrCost( - Opcode, Ty, Opd1Info, Opd2Info, Opd1PropInfo, Opd2PropInfo); - - if (VectorType *VTy = dyn_cast<VectorType>(Ty)) { - switch (Opcode) { - case Instruction::LShr: - case Instruction::AShr: - case Instruction::Shl: - // SIMD128's shifts currently only accept a scalar shift count. For each - // element, we'll need to extract, op, insert. The following is a rough - // approxmation. - if (Opd2Info != TTI::OK_UniformValue && - Opd2Info != TTI::OK_UniformConstantValue) - Cost = VTy->getNumElements() * - (TargetTransformInfo::TCC_Basic + - getArithmeticInstrCost(Opcode, VTy->getElementType()) + - TargetTransformInfo::TCC_Basic); - break; - } - } - return Cost; -} - -unsigned WebAssemblyTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, - unsigned Index) { - unsigned Cost = BasicTTIImplBase::getVectorInstrCost(Opcode, Val, Index); - - // SIMD128's insert/extract currently only take constant indices. - if (Index == -1u) - return Cost + 25 * TargetTransformInfo::TCC_Expensive; - - return Cost; -} |
