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| author |   visa <visa@openbsd.org> | 2019-06-23 15:26:42 +0000 |
|---|---|---|
| committer | visa <visa@openbsd.org> | 2019-06-23 15:26:42 +0000 |
| commit | 98d8a846ee35a2a19b2442b31c6de09dcb6e53ea (patch) | |
| tree | 8090dca2b3e5b5f2061377345ed593906dc61463 /gnu/llvm/tools/clang/lib/CodeGen/CGClass.cpp | |
| parent | Create space for the bootloader/firmware for Rockchip SoCs by leaving (diff) | |
| download | wireguard-openbsd-98d8a846ee35a2a19b2442b31c6de09dcb6e53ea.tar.xz wireguard-openbsd-98d8a846ee35a2a19b2442b31c6de09dcb6e53ea.zip | |
Invalidate icache when changing mapping
On octeon, the instruction cache appears to fulfill instruction fetches
on icache hit even if the virtual address mapping no longer exists or
does not allow execution. Prevent running of lingering instructions
by invalidating the icache when changing a mapping that has previously
been executable.
This fix is somewhat rough and relies on the availability of the XI bit.
Diffstat (limited to 'gnu/llvm/tools/clang/lib/CodeGen/CGClass.cpp')
0 files changed, 0 insertions, 0 deletions