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| author | 2018-04-06 14:26:03 +0000 | |
|---|---|---|
| committer | 2018-04-06 14:26:03 +0000 | |
| commit | bdabc2f19ffb9e20600dad6e8a300842a7bda50e (patch) | |
| tree | c50e7b2e5449b074651bb82a58517a8ebc4a8cf7 /gnu/llvm/utils/TableGen/CodeGenTarget.h | |
| parent | Print a 'p' flag for file descriptors that were opened after pledge(2). (diff) | |
| download | wireguard-openbsd-bdabc2f19ffb9e20600dad6e8a300842a7bda50e.tar.xz wireguard-openbsd-bdabc2f19ffb9e20600dad6e8a300842a7bda50e.zip | |
Import LLVM 6.0.1 release including clang, lld and lldb.
"where is the kaboom?" deraadt@
Diffstat (limited to 'gnu/llvm/utils/TableGen/CodeGenTarget.h')
| -rw-r--r-- | gnu/llvm/utils/TableGen/CodeGenTarget.h | 41 |
1 files changed, 11 insertions, 30 deletions
diff --git a/gnu/llvm/utils/TableGen/CodeGenTarget.h b/gnu/llvm/utils/TableGen/CodeGenTarget.h index ff624ea559e..7280d707fba 100644 --- a/gnu/llvm/utils/TableGen/CodeGenTarget.h +++ b/gnu/llvm/utils/TableGen/CodeGenTarget.h @@ -17,8 +17,11 @@ #ifndef LLVM_UTILS_TABLEGEN_CODEGENTARGET_H #define LLVM_UTILS_TABLEGEN_CODEGENTARGET_H +#include "CodeGenHwModes.h" #include "CodeGenInstruction.h" #include "CodeGenRegisters.h" +#include "InfoByHwMode.h" +#include "SDNodeProperties.h" #include "llvm/Support/raw_ostream.h" #include "llvm/TableGen/Record.h" #include <algorithm> @@ -29,25 +32,6 @@ struct CodeGenRegister; class CodeGenSchedModels; class CodeGenTarget; -// SelectionDAG node properties. -// SDNPMemOperand: indicates that a node touches memory and therefore must -// have an associated memory operand that describes the access. -enum SDNP { - SDNPCommutative, - SDNPAssociative, - SDNPHasChain, - SDNPOutGlue, - SDNPInGlue, - SDNPOptInGlue, - SDNPMayLoad, - SDNPMayStore, - SDNPSideEffect, - SDNPMemOperand, - SDNPVariadic, - SDNPWantRoot, - SDNPWantParent -}; - /// getValueType - Return the MVT::SimpleValueType that the specified TableGen /// record corresponds to. MVT::SimpleValueType getValueType(Record *Rec); @@ -69,7 +53,8 @@ class CodeGenTarget { std::unique_ptr<CodeGenInstruction>> Instructions; mutable std::unique_ptr<CodeGenRegBank> RegBank; mutable std::vector<Record*> RegAltNameIndices; - mutable SmallVector<MVT::SimpleValueType, 8> LegalValueTypes; + mutable SmallVector<ValueTypeByHwMode, 8> LegalValueTypes; + CodeGenHwModes CGH; void ReadRegAltNameIndices() const; void ReadInstructions() const; void ReadLegalValueTypes() const; @@ -128,22 +113,18 @@ public: /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the /// specified physical register. - std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const; + std::vector<ValueTypeByHwMode> getRegisterVTs(Record *R) const; - ArrayRef<MVT::SimpleValueType> getLegalValueTypes() const { - if (LegalValueTypes.empty()) ReadLegalValueTypes(); + ArrayRef<ValueTypeByHwMode> getLegalValueTypes() const { + if (LegalValueTypes.empty()) + ReadLegalValueTypes(); return LegalValueTypes; } - /// isLegalValueType - Return true if the specified value type is natively - /// supported by the target (i.e. there are registers that directly hold it). - bool isLegalValueType(MVT::SimpleValueType VT) const { - ArrayRef<MVT::SimpleValueType> LegalVTs = getLegalValueTypes(); - return is_contained(LegalVTs, VT); - } - CodeGenSchedModels &getSchedModels() const; + const CodeGenHwModes &getHwModes() const { return CGH; } + private: DenseMap<const Record*, std::unique_ptr<CodeGenInstruction>> & getInstructions() const { |
