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authorpatrick <patrick@openbsd.org>2017-02-25 17:04:19 +0000
committerpatrick <patrick@openbsd.org>2017-02-25 17:04:19 +0000
commitc17c7ba4ca6380bb28e99ac868ba8791799e1c61 (patch)
tree2cca245ea9d9942ecb3c1534f334bb3803197bbc /lib
parentMSI interrupts are established in a different way as well. Instead of (diff)
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Implement ampintcmsi(4) in ampintc(4) to support MSI. The GICv2M is an
extension to the GIC controller, which is represented as subnode in the device tree. There can be multiple GICv2Ms, so it makes sense to attach those to ampintc(4) as some kind of simplebus. The GICv2M is simply an interrupt generator that can be used by PCIe devices to ring the door bell. There is no need for further configuration, we only need to find out which SPIs we are allowed to use for MSI and to register an edge triggered interrupt on a (randomly) allocated SPI. ok kettenis@
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