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| author |   kettenis <kettenis@openbsd.org> | 2020-03-01 18:00:12 +0000 |
|---|---|---|
| committer | kettenis <kettenis@openbsd.org> | 2020-03-01 18:00:12 +0000 |
| commit | e47af70cdeb5acfe1a87aad4c03862b7d6981395 (patch) | |
| tree | 34c4e1347464235a8a55bc6586bc5b85935568c5 /lib | |
| parent | Make it possible to set the VPLL clock frequency and add a few more PLL clock (diff) | |
| download | wireguard-openbsd-e47af70cdeb5acfe1a87aad4c03862b7d6981395.tar.xz wireguard-openbsd-e47af70cdeb5acfe1a87aad4c03862b7d6981395.zip | |
When activating a video port, don't bail out if activating an endpoint
fails. Not reporting an error in that case isn't ideal, but this gets
us a bit further along in supporting drm(4) on RK3399 SoCs.
ok patrick@
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions