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author | 2020-11-09 15:09:09 +0000 | |
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committer | 2020-11-09 15:09:09 +0000 | |
commit | 783972a23f27e10a4f821a4e936c80cd2b214c89 (patch) | |
tree | 96107f35d1b7e7437783ced0171b30deedc324f4 /regress/lib/libc | |
parent | speed up the dependency check pass significantly: (diff) | |
download | wireguard-openbsd-783972a23f27e10a4f821a4e936c80cd2b214c89.tar.xz wireguard-openbsd-783972a23f27e10a4f821a4e936c80cd2b214c89.zip |
There seems to be a silicon errata for 82598 ix(4) chips. When the
link state changes and an interrupt is fired for that, the MSI-X
interrupt mask bits of the queues are cleared. During init while
the queues are enabled by the driver, the hardware disabled them
in the background. Then receiving packets did not work.
In MSI-X mode, use the FreeBSD logic to read the cause from EICS register.
from Christiano Haesbaert; tested with 82599 and X540T and OK jmatthew@
Diffstat (limited to 'regress/lib/libc')
0 files changed, 0 insertions, 0 deletions