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| author |   miod <miod@openbsd.org> | 2012-04-05 21:48:37 +0000 |
|---|---|---|
| committer | miod <miod@openbsd.org> | 2012-04-05 21:48:37 +0000 |
| commit | f140e1954723fb3925061ad112d44a180ba5bc72 (patch) | |
| tree | 256fafc949bcde7767e5a85c34723079dbfda98e /share/man/man4/options.4 | |
| parent | Add an explicit bus_space_barrier() function for revision 3 hpc, which has a (diff) | |
| download | wireguard-openbsd-f140e1954723fb3925061ad112d44a180ba5bc72.tar.xz wireguard-openbsd-f140e1954723fb3925061ad112d44a180ba5bc72.zip | |
Lower ZS_DELAY() back to what it was, but issue a bus_space_barrier() after
every register write. Hinted by IRIX' <sys/z8530.h>.
While there, flip the CTS, DCD, RTS and DTR bits in registers #0 and #5.
Aforementioned header says they are inverted due to a hardware bug.
Tested on IP20, IP22 and IP24.
Diffstat (limited to 'share/man/man4/options.4')
0 files changed, 0 insertions, 0 deletions