Implement fractional PLL frequencies for RK3328 and use them for APLL and

GPLL like the Linux kernel does.  Use NPLL for the CPU clock such that
adjusting the CPU frequency doesn't change the clock of other devices
anymore.  Implement the last clocks that are used in the assigned-clocks
property of clock controller.

Don't enable the assigned-clocks processing yet as it results in a sub-optimal
clock for for the SD and eMMC controllers.  This clock handling in dwmcc(4)
needs some further work before we can enable this.

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