summaryrefslogtreecommitdiffstats
path: root/sys/arch/sgi/hpc/hpcvar.h
diff options
context:
space:
mode:
authormiod <miod@openbsd.org>2012-05-27 14:27:08 +0000
committermiod <miod@openbsd.org>2012-05-27 14:27:08 +0000
commit3e1330b5b1836473f532c736d33fc927f44ea6fc (patch)
treed98a2d17b3bf00e201ae9ebb4647160289eb126b /sys/arch/sgi/hpc/hpcvar.h
parentDecide once for all whether IP22/IP28 systems are running with the ECC memory (diff)
downloadwireguard-openbsd-3e1330b5b1836473f532c736d33fc927f44ea6fc.tar.xz
wireguard-openbsd-3e1330b5b1836473f532c736d33fc927f44ea6fc.zip
Proper support for the so-called `fast mode' of the Indigo2 ECC memory
controller. In this mode, access to physical memory are not allowed to bypass the cache, and this allows the memory subsystem to run faster. Of course, some device drivers will require uncached memory access (e.g. for proper HPC DMA descriptor operation). New ip22-specific functions to switch between `fast mode' and `slow mode' are introduced. hpc(4) now provides read and write routines to fetch a dma descriptor from uncached memory into a local copy, and update it from said modified copy. On systems without the ECC MC, these will do nothing and operation will continue to access the uncached memory directly. On systems with the ECC MC, they will perform a copy, and the writeback will be done in slow mode. bus_dmamem_map() requests for DMA memory with BUS_DMA_COHERENT set in flags, which would return uncached memory, will now always fail on systems with the ECC memory controller. Drivers which really need uncached memory, and are aware of this particular setup, will now pass BUS_DMA_COHERENT | BUS_DMA_BUS1, which will let the request succeed. sq(4) will use all of the above to work mostly unmodified on ECC MC systems in fast mode. Finally, fast mode is enabled after autoconf. Tested on IP22 and IP28.
Diffstat (limited to 'sys/arch/sgi/hpc/hpcvar.h')
-rw-r--r--sys/arch/sgi/hpc/hpcvar.h12
1 files changed, 11 insertions, 1 deletions
diff --git a/sys/arch/sgi/hpc/hpcvar.h b/sys/arch/sgi/hpc/hpcvar.h
index 9a1e656c6b7..6c0f7a86aed 100644
--- a/sys/arch/sgi/hpc/hpcvar.h
+++ b/sys/arch/sgi/hpc/hpcvar.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: hpcvar.h,v 1.7 2012/04/30 21:30:33 miod Exp $ */
+/* $OpenBSD: hpcvar.h,v 1.8 2012/05/27 14:27:08 miod Exp $ */
/* $NetBSD: hpcvar.h,v 1.12 2011/01/25 12:21:04 tsutsui Exp $ */
/*
@@ -110,4 +110,14 @@ int hpc_is_intr_pending(int);
void hpc_intr_disable(void *);
void hpc_intr_enable(void *);
+/*
+ * Routines to copy and update HPC DMA descriptors in uncached memory;
+ * needed for proper operation on ECC MC systems.
+ */
+struct hpc_dma_desc;
+
+struct hpc_dma_desc *hpc_read_dma_desc(struct hpc_dma_desc *src,
+ struct hpc_dma_desc *store);
+void hpc_write_dma_desc(struct hpc_dma_desc *dst, struct hpc_dma_desc *src);
+
extern bus_space_t hpc3bus_tag;