Add clock support for i.MX8MP. This variant uses essentially the

same layout as the i.MX8MM, which means that all supported clocks
so far have the same selection of parents and allows reusing the
i.MX8MM code.

1 files changed, 53 insertions, 1 deletions

diff --git a/sys/dev/fdt/imxccm.c b/sys/dev/fdt/imxccm.c
index 91301606e86..91253a01350 100644
--- a/sys/dev/fdt/imxccm.c
+++ b/sys/dev/fdt/imxccm.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: imxccm.c,v 1.22 2020/10/12 17:38:28 patrick Exp $ */
+/* $OpenBSD: imxccm.c,v 1.23 2020/11/07 21:42:47 patrick Exp $ */
 /*
  * Copyright (c) 2012-2013 Patrick Wildt <patrick@blueri.se>
  *
@@ -273,6 +273,7 @@ imxccm_match(struct device *parent, void *match, void *aux)
 	    OF_is_compatible(faa->fa_node, "fsl,imx6ul-ccm") ||
 	    OF_is_compatible(faa->fa_node, "fsl,imx7d-ccm") ||
 	    OF_is_compatible(faa->fa_node, "fsl,imx8mm-ccm") ||
+	    OF_is_compatible(faa->fa_node, "fsl,imx8mp-ccm") ||
 	    OF_is_compatible(faa->fa_node, "fsl,imx8mq-ccm"));
 }
 
@@ -303,6 +304,17 @@ imxccm_attach(struct device *parent, struct device *self, void *aux)
 		sc->sc_nmuxs = nitems(imx8mm_muxs);
 		sc->sc_predivs = imx8mm_predivs;
 		sc->sc_npredivs = nitems(imx8mm_predivs);
+	} else if (OF_is_compatible(sc->sc_node, "fsl,imx8mp-ccm")) {
+		sc->sc_anatop = regmap_bycompatible("fsl,imx8mp-anatop");
+		KASSERT(sc->sc_anatop != NULL);
+		sc->sc_gates = imx8mp_gates;
+		sc->sc_ngates = nitems(imx8mp_gates);
+		sc->sc_divs = imx8mp_divs;
+		sc->sc_ndivs = nitems(imx8mp_divs);
+		sc->sc_muxs = imx8mp_muxs;
+		sc->sc_nmuxs = nitems(imx8mp_muxs);
+		sc->sc_predivs = imx8mp_predivs;
+		sc->sc_npredivs = nitems(imx8mp_predivs);
 	} else if (OF_is_compatible(sc->sc_node, "fsl,imx8mq-ccm")) {
 		sc->sc_anatop = regmap_bycompatible("fsl,imx8mq-anatop");
 		KASSERT(sc->sc_anatop != NULL);
@@ -1479,6 +1491,46 @@ imxccm_get_frequency(void *cookie, uint32_t *cells)
 			pre = pre & sc->sc_predivs[idx].mask;
 			return ((freq / (pre + 1)) / (div + 1));
 		}
+	} else if (sc->sc_gates == imx8mp_gates) {
+		/* These are composite clocks. */
+		if (idx < sc->sc_ngates && sc->sc_gates[idx].reg &&
+		    idx < sc->sc_ndivs && sc->sc_divs[idx].reg &&
+		    idx < sc->sc_npredivs && sc->sc_predivs[idx].reg) {
+			switch (idx) {
+			case IMX8MP_CLK_ENET_AXI:
+				freq = imxccm_imx8mm_enet(sc, idx);
+				break;
+			case IMX8MP_CLK_I2C1:
+			case IMX8MP_CLK_I2C2:
+			case IMX8MP_CLK_I2C3:
+			case IMX8MP_CLK_I2C4:
+			case IMX8MP_CLK_I2C5:
+			case IMX8MP_CLK_I2C6:
+				freq = imxccm_imx8mm_i2c(sc, idx);
+				break;
+			case IMX8MP_CLK_UART1:
+			case IMX8MP_CLK_UART2:
+			case IMX8MP_CLK_UART3:
+			case IMX8MP_CLK_UART4:
+				freq = imxccm_imx8mm_uart(sc, idx);
+				break;
+			case IMX8MP_CLK_USDHC1:
+			case IMX8MP_CLK_USDHC2:
+			case IMX8MP_CLK_USDHC3:
+				freq = imxccm_imx8mm_usdhc(sc, idx);
+				break;
+			default:
+				printf("%s: 0x%08x\n", __func__, idx);
+				return 0;
+			}
+
+			reg = HREAD4(sc, sc->sc_divs[idx].reg);
+			div = reg >> sc->sc_divs[idx].shift;
+			div = div & sc->sc_divs[idx].mask;
+			pre = reg >> sc->sc_predivs[idx].shift;
+			pre = pre & sc->sc_predivs[idx].mask;
+			return ((freq / (pre + 1)) / (div + 1));
+		}
 	} else if (sc->sc_gates == imx8mq_gates) {
 		switch (idx) {
 		case IMX8MQ_CLK_ARM: