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author | 2019-01-11 08:00:34 +0000 | |
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committer | 2019-01-11 08:00:34 +0000 | |
commit | 845ecb9b969ecb87d0a4217e27e76d890a9c5636 (patch) | |
tree | 4469e0cd6129ac92669817656c9629deca1ae514 /sys/dev/fdt/imxccm.c | |
parent | Move the placement of pmap_kernel's toplevel PML4 page (diff) | |
download | wireguard-openbsd-845ecb9b969ecb87d0a4217e27e76d890a9c5636.tar.xz wireguard-openbsd-845ecb9b969ecb87d0a4217e27e76d890a9c5636.zip |
Add support for changing the parent of the PCIe clocks. We will
use this for setting the PCIe clocks to the correct frequency.
ok kettenis@
Diffstat (limited to 'sys/dev/fdt/imxccm.c')
-rw-r--r-- | sys/dev/fdt/imxccm.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/sys/dev/fdt/imxccm.c b/sys/dev/fdt/imxccm.c index e1e0ddd42cf..0ec5e31bb2c 100644 --- a/sys/dev/fdt/imxccm.c +++ b/sys/dev/fdt/imxccm.c @@ -1,4 +1,4 @@ -/* $OpenBSD: imxccm.c,v 1.11 2018/08/20 16:48:03 patrick Exp $ */ +/* $OpenBSD: imxccm.c,v 1.12 2019/01/11 08:00:34 patrick Exp $ */ /* * Copyright (c) 2012-2013 Patrick Wildt <patrick@blueri.se> * @@ -1243,6 +1243,24 @@ imxccm_set_parent(void *cookie, uint32_t *cells, uint32_t *pcells) mux |= (0x1 << sc->sc_muxs[idx].shift); HWRITE4(sc, sc->sc_muxs[idx].reg, mux); return 0; + case IMX8MQ_CLK_PCIE1_CTRL_SRC: + case IMX8MQ_CLK_PCIE2_CTRL_SRC: + if (pidx != IMX8MQ_SYS2_PLL_250M) + break; + mux = HREAD4(sc, sc->sc_muxs[idx].reg); + mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift); + mux |= (0x1 << sc->sc_muxs[idx].shift); + HWRITE4(sc, sc->sc_muxs[idx].reg, mux); + return 0; + case IMX8MQ_CLK_PCIE1_PHY_SRC: + case IMX8MQ_CLK_PCIE2_PHY_SRC: + if (pidx != IMX8MQ_SYS2_PLL_100M) + break; + mux = HREAD4(sc, sc->sc_muxs[idx].reg); + mux &= ~(sc->sc_muxs[idx].mask << sc->sc_muxs[idx].shift); + mux |= (0x1 << sc->sc_muxs[idx].shift); + HWRITE4(sc, sc->sc_muxs[idx].reg, mux); + return 0; } } |