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| author |   kettenis <kettenis@openbsd.org> | 2017-12-12 10:25:39 +0000 |
|---|---|---|
| committer | kettenis <kettenis@openbsd.org> | 2017-12-12 10:25:39 +0000 |
| commit | a7113a34ae93b095d1e68fb0725b6d4673919bf9 (patch) | |
| tree | f5af4ca042975b3f15b9b8717baa88c1612c52b6 /sys/dev/fdt/sxiccmu_clocks.h | |
| parent | Avoid undefined behaviour in rorate_left() macro. From NetBSD via FreeBSD. (diff) | |
| download | wireguard-openbsd-a7113a34ae93b095d1e68fb0725b6d4673919bf9.tar.xz wireguard-openbsd-a7113a34ae93b095d1e68fb0725b6d4673919bf9.zip | |
Fix typo. Unbreaks building a kernel on arm64/clang.
Diffstat (limited to 'sys/dev/fdt/sxiccmu_clocks.h')
| -rw-r--r-- | sys/dev/fdt/sxiccmu_clocks.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/dev/fdt/sxiccmu_clocks.h b/sys/dev/fdt/sxiccmu_clocks.h index 25accb93f6f..3d5808917e4 100644 --- a/sys/dev/fdt/sxiccmu_clocks.h +++ b/sys/dev/fdt/sxiccmu_clocks.h @@ -166,7 +166,7 @@ struct sxiccmu_ccu_bit sun9i_a80_gates[] = { [A80_CLK_MMC0] = { 0x0410, 31 }, [A80_CLK_MMC1] = { 0x0414, 31 }, [A80_CLK_MMC2] = { 0x0418, 31 }, - [A80_CLK_MMC2] = { 0x041c, 31 }, + [A80_CLK_MMC3] = { 0x041c, 31 }, [A80_CLK_BUS_PIO] = { 0x0590, 5 }, [A80_CLK_BUS_UART0] = { 0x0594, 16, A80_CLK_APB1 }, [A80_CLK_BUS_UART1] = { 0x0594, 17, A80_CLK_APB1 }, |