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| author |   kettenis <kettenis@openbsd.org> | 2017-12-24 18:24:06 +0000 |
|---|---|---|
| committer | kettenis <kettenis@openbsd.org> | 2017-12-24 18:24:06 +0000 |
| commit | d524c0fae259fe7d7363c34b96ab0960b16355bb (patch) | |
| tree | c713fb9d6fc4f1d1f45a547923fe13de670b4c18 /sys/dev/fdt/sxiccmu_clocks.h | |
| parent | Use more libm. (diff) | |
| download | wireguard-openbsd-d524c0fae259fe7d7363c34b96ab0960b16355bb.tar.xz wireguard-openbsd-d524c0fae259fe7d7363c34b96ab0960b16355bb.zip | |
Implement A10/A20 CPU clock.
Diffstat (limited to 'sys/dev/fdt/sxiccmu_clocks.h')
| -rw-r--r-- | sys/dev/fdt/sxiccmu_clocks.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sys/dev/fdt/sxiccmu_clocks.h b/sys/dev/fdt/sxiccmu_clocks.h index 74bed95dea7..58800aab6a6 100644 --- a/sys/dev/fdt/sxiccmu_clocks.h +++ b/sys/dev/fdt/sxiccmu_clocks.h @@ -7,9 +7,12 @@ /* A10/A20 */ +#define A10_CLK_HOSC 1 +#define A10_CLK_PLL_CORE 2 #define A10_CLK_PLL_PERIPH_BASE 14 #define A10_CLK_PLL_PERIPH 15 +#define A10_CLK_CPU 20 #define A10_CLK_APB1 25 #define A10_CLK_AHB_EHCI0 27 @@ -43,6 +46,8 @@ #define A10_CLK_SATA 122 #define A10_CLK_USB_PHY 125 +#define A10_CLK_LOSC 254 + struct sxiccmu_ccu_bit sun4i_a10_gates[] = { [A10_CLK_AHB_EHCI0] = { 0x0060, 1 }, [A10_CLK_AHB_EHCI1] = { 0x0060, 3 }, |