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authoraaron <aaron@openbsd.org>2001-02-09 21:15:22 +0000
committeraaron <aaron@openbsd.org>2001-02-09 21:15:22 +0000
commit09e11de5fddc60deccfc6e5d8b27afd96afbd274 (patch)
treee48f7034ce08d4d9608b42b3772ae989d2b1ee8d /sys/dev/pci/cs4281reg.h
parentAdd PCI Power Management Control Register definitions; from NetBSD. (diff)
downloadwireguard-openbsd-09e11de5fddc60deccfc6e5d8b27afd96afbd274.tar.xz
wireguard-openbsd-09e11de5fddc60deccfc6e5d8b27afd96afbd274.zip
Tickle D0 power state so the cs4281 works after reboots from Windows 2000.
From NetBSD, tested on a dual-boot IBM ThinkPad X20.
Diffstat (limited to 'sys/dev/pci/cs4281reg.h')
-rw-r--r--sys/dev/pci/cs4281reg.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/sys/dev/pci/cs4281reg.h b/sys/dev/pci/cs4281reg.h
index 73f2c39118e..4e8230a209b 100644
--- a/sys/dev/pci/cs4281reg.h
+++ b/sys/dev/pci/cs4281reg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: cs4281reg.h,v 1.1 2001/01/13 19:53:50 aaron Exp $ */
+/* $OpenBSD: cs4281reg.h,v 1.2 2001/02/09 21:15:23 aaron Exp $ */
/* $Tera: cs4281reg.h,v 1.9 2000/12/31 10:52:25 tacha Exp $ */
/*
@@ -161,6 +161,7 @@
#define CS4281_PMCS 0x344 /* Power Management Control/Status */
#define CS4281_CWPR 0x3E0 /* Configuration Write Protect Register */
#define CS4281_EPPMC 0x3E4 /* Extended PCI Power Management Control */
+#define EPPMC_FPDN (0x1 << 14)
#define CS4281_GPIOR 0x3E8 /* GPIO Pin Interface Register */
#define CS4281_SPMC 0x3EC /* Serial Port Power Management Control (& ASDIN2 enable) */
#define SPMC_RSTN 0x00000001