diff options
| author |   jsg <jsg@openbsd.org> | 2019-10-08 05:38:23 +0000 |
|---|---|---|
| committer | jsg <jsg@openbsd.org> | 2019-10-08 05:38:23 +0000 |
| commit | df91763a4b17c80ac583e5e06a50c06f7e399b14 (patch) | |
| tree | 367e36e2a21ddb083494cb342ac8c3ca9a092d1e /sys/dev/pci/drm/amd/amdgpu/amdgpu_si.c | |
| parent | drm/amd/display: support spdif (diff) | |
| download | wireguard-openbsd-df91763a4b17c80ac583e5e06a50c06f7e399b14.tar.xz wireguard-openbsd-df91763a4b17c80ac583e5e06a50c06f7e399b14.zip | |
drm/amdgpu/si: fix ASIC tests
From Jean Delvare
39b6d05169b2730a26887be7aff3680d44cf694c in linux 4.19.y/4.19.78
77efe48a729588527afb4d5811b9e0acb29f5e51 in mainline linux
Diffstat (limited to 'sys/dev/pci/drm/amd/amdgpu/amdgpu_si.c')
| -rw-r--r-- | sys/dev/pci/drm/amd/amdgpu/amdgpu_si.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/amdgpu_si.c b/sys/dev/pci/drm/amd/amdgpu/amdgpu_si.c index 85387adc330..948121d6a04 100644 --- a/sys/dev/pci/drm/amd/amdgpu/amdgpu_si.c +++ b/sys/dev/pci/drm/amd/amdgpu/amdgpu_si.c @@ -1813,7 +1813,7 @@ static void si_program_aspm(struct amdgpu_device *adev) if (orig != data) si_pif_phy1_wreg(adev,PB1_PIF_PWRDOWN_1, data); - if ((adev->family != CHIP_OLAND) && (adev->family != CHIP_HAINAN)) { + if ((adev->asic_type != CHIP_OLAND) && (adev->asic_type != CHIP_HAINAN)) { orig = data = si_pif_phy0_rreg(adev,PB0_PIF_PWRDOWN_0); data &= ~PLL_RAMP_UP_TIME_0_MASK; if (orig != data) @@ -1862,14 +1862,14 @@ static void si_program_aspm(struct amdgpu_device *adev) orig = data = si_pif_phy0_rreg(adev,PB0_PIF_CNTL); data &= ~LS2_EXIT_TIME_MASK; - if ((adev->family == CHIP_OLAND) || (adev->family == CHIP_HAINAN)) + if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) data |= LS2_EXIT_TIME(5); if (orig != data) si_pif_phy0_wreg(adev,PB0_PIF_CNTL, data); orig = data = si_pif_phy1_rreg(adev,PB1_PIF_CNTL); data &= ~LS2_EXIT_TIME_MASK; - if ((adev->family == CHIP_OLAND) || (adev->family == CHIP_HAINAN)) + if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) data |= LS2_EXIT_TIME(5); if (orig != data) si_pif_phy1_wreg(adev,PB1_PIF_CNTL, data); |