diff options
| author |   jsg <jsg@openbsd.org> | 2020-06-08 04:47:57 +0000 |
|---|---|---|
| committer | jsg <jsg@openbsd.org> | 2020-06-08 04:47:57 +0000 |
| commit | c349dbc7938c71a30e13c1be4acc1976165f4630 (patch) | |
| tree | 8798187dfd7a927a15123e8dad31b782b074baa8 /sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c | |
| parent | The errcheck() function treats an errno of ERANGE or EDOM as something (diff) | |
| download | wireguard-openbsd-c349dbc7938c71a30e13c1be4acc1976165f4630.tar.xz wireguard-openbsd-c349dbc7938c71a30e13c1be4acc1976165f4630.zip | |
update drm to linux 5.7
adds kernel support for
amdgpu: vega20, raven2, renoir, navi10, navi14
inteldrm: icelake, tigerlake
Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for
helping, patrick@ for helping adapt rockchip drm and many developers for
testing.
Diffstat (limited to 'sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c')
| -rw-r--r-- | sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c b/sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c index 448d19f38a5..d0f4e20621e 100644 --- a/sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c +++ b/sys/dev/pci/drm/amd/amdgpu/mxgpu_ai.c @@ -26,6 +26,7 @@ #include "nbio/nbio_6_1_sh_mask.h" #include "gc/gc_9_0_offset.h" #include "gc/gc_9_0_sh_mask.h" +#include "mp/mp_9_0_offset.h" #include "soc15.h" #include "vega10_ih.h" #include "soc15_common.h" @@ -249,7 +250,7 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work) */ locked = mutex_trylock(&adev->lock_reset); if (locked) - adev->in_gpu_reset = 1; + adev->in_gpu_reset = true; do { if (xgpu_ai_mailbox_peek_msg(adev) == IDH_FLR_NOTIFICATION_CMPL) @@ -261,13 +262,14 @@ static void xgpu_ai_mailbox_flr_work(struct work_struct *work) flr_done: if (locked) { - adev->in_gpu_reset = 0; + adev->in_gpu_reset = false; mutex_unlock(&adev->lock_reset); } /* Trigger recovery for world switch failure if no TDR */ - if (amdgpu_lockup_timeout == 0) - amdgpu_device_gpu_recover(adev, NULL, true); + if (amdgpu_device_should_recover_gpu(adev) + && adev->sdma_timeout == MAX_SCHEDULE_TIMEOUT) + amdgpu_device_gpu_recover(adev, NULL); } static int xgpu_ai_set_mailbox_rcv_irq(struct amdgpu_device *adev, @@ -295,6 +297,9 @@ static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device *adev, if (amdgpu_sriov_runtime(adev)) schedule_work(&adev->virt.flr_work); break; + case IDH_QUERY_ALIVE: + xgpu_ai_mailbox_send_ack(adev); + break; /* READY_TO_ACCESS_GPU is fetched by kernel polling, IRQ can ignore * it byfar since that polling thread will handle it, * other msg like flr complete is not handled here. |