diff options
| author | 2008-11-17 00:43:13 +0000 | |
|---|---|---|
| committer | 2008-11-17 00:43:13 +0000 | |
| commit | e2d2d9fa0bb53fbb786a910dc6afbb4bb7a17dea (patch) | |
| tree | 68ee0f8b4a2407d9b9f73fb27c0a6aa0ba96ffc2 /sys/dev/pci/drm/i915_irq.c | |
| parent | - recognize some Conexant codecs. (diff) | |
| download | wireguard-openbsd-e2d2d9fa0bb53fbb786a910dc6afbb4bb7a17dea.tar.xz wireguard-openbsd-e2d2d9fa0bb53fbb786a910dc6afbb4bb7a17dea.zip | |
Conditionalise the use of the SAREA in inteldrm. In DRI2 setups (which we don't
support yet, but will) it won't exist, prepare for this by only writing to it if
it's there.
Bits of this came from Eric Anholt at intel.
Diffstat (limited to 'sys/dev/pci/drm/i915_irq.c')
| -rw-r--r-- | sys/dev/pci/drm/i915_irq.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/sys/dev/pci/drm/i915_irq.c b/sys/dev/pci/drm/i915_irq.c index b0d268960ff..d51aff13131 100644 --- a/sys/dev/pci/drm/i915_irq.c +++ b/sys/dev/pci/drm/i915_irq.c @@ -200,7 +200,7 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) I915_WRITE(IIR, iir); (void) I915_READ(IIR); /* Flush posted writes */ - if (dev_priv->sarea_priv) + if (dev_priv->sarea_priv != NULL) dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); if (iir & I915_USER_INTERRUPT) { @@ -259,7 +259,7 @@ int i915_wait_irq(struct drm_device * dev, int irq_nr) READ_BREADCRUMB(dev_priv)); if (READ_BREADCRUMB(dev_priv) >= irq_nr) { - if (dev_priv->sarea_priv) { + if (dev_priv->sarea_priv != NULL) { dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); } @@ -276,9 +276,8 @@ int i915_wait_irq(struct drm_device * dev, int irq_nr) READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); } - if (dev_priv->sarea_priv) - dev_priv->sarea_priv->last_dispatch = - READ_BREADCRUMB(dev_priv); + if (dev_priv->sarea_priv != NULL) + dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); return ret; } |
