diff options
| author |   mmcc <mmcc@openbsd.org> | 2015-12-14 03:04:10 +0000 |
|---|---|---|
| committer | mmcc <mmcc@openbsd.org> | 2015-12-14 03:04:10 +0000 |
| commit | cbfc51a20d7e46894e376e0dabfc55661bc74ac1 (patch) | |
| tree | 26a2dbbfb5a451cac51d1a1a1943409dc00b940a /sys/dev | |
| parent | Update default MTA reference to smtpd(8). Rectify documentation of (diff) | |
| download | wireguard-openbsd-cbfc51a20d7e46894e376e0dabfc55661bc74ac1.tar.xz wireguard-openbsd-cbfc51a20d7e46894e376e0dabfc55661bc74ac1.zip | |
"harware" -> "hardware"
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/audio.c | 4 | ||||
| -rw-r--r-- | sys/dev/pci/if_em_hw.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/sys/dev/audio.c b/sys/dev/audio.c index fc504f5ee88..70114f50ab6 100644 --- a/sys/dev/audio.c +++ b/sys/dev/audio.c @@ -1,4 +1,4 @@ -/* $OpenBSD: audio.c,v 1.139 2015/09/04 16:02:19 ratchov Exp $ */ +/* $OpenBSD: audio.c,v 1.140 2015/12/14 03:04:10 mmcc Exp $ */ /* * Copyright (c) 2015 Alexandre Ratchov <alex@caoua.org> * @@ -95,7 +95,7 @@ struct audio_softc { int quiesce; /* device suspended */ struct audio_buf play, rec; unsigned int sw_enc; /* user exposed AUDIO_ENCODING_* */ - unsigned int hw_enc; /* harware AUDIO_ENCODING_* */ + unsigned int hw_enc; /* hardware AUDIO_ENCODING_* */ unsigned int bits; /* bits per sample */ unsigned int bps; /* bytes-per-sample */ unsigned int msb; /* sample are MSB aligned */ diff --git a/sys/dev/pci/if_em_hw.c b/sys/dev/pci/if_em_hw.c index 446c50cfa0b..06daed28c17 100644 --- a/sys/dev/pci/if_em_hw.c +++ b/sys/dev/pci/if_em_hw.c @@ -31,7 +31,7 @@ *******************************************************************************/ -/* $OpenBSD: if_em_hw.c,v 1.89 2015/11/24 17:11:39 mpi Exp $ */ +/* $OpenBSD: if_em_hw.c,v 1.90 2015/12/14 03:04:10 mmcc Exp $ */ /* * if_em_hw.c Shared functions for accessing and configuring the MAC */ @@ -9579,7 +9579,7 @@ em_ich8_cycle_init(struct em_hw *hw) /* * Either we should have a hardware SPI cycle in progress bit to * check against, in order to start a new cycle or FDONE bit should - * be changed in the hardware so that it is 1 after harware reset, + * be changed in the hardware so that it is 1 after hardware reset, * which can then be used as an indication whether a cycle is in * progress or has been completed .. we should also have some * software semaphore mechanism to guard FDONE or the cycle in |