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| author |   dlg <dlg@openbsd.org> | 2013-05-01 00:47:31 +0000 |
|---|---|---|
| committer | dlg <dlg@openbsd.org> | 2013-05-01 00:47:31 +0000 |
| commit | 2ab43ed2e8d50089fbf0e754e34834e93be99ef9 (patch) | |
| tree | 3b2e10a9a1a804a8d5349dae6deca14c38523b8c /sys/kern/kern_rwlock.c | |
| parent | Add a cortex bus which represents the ARM MPCore Complex. (diff) | |
| download | wireguard-openbsd-2ab43ed2e8d50089fbf0e754e34834e93be99ef9.tar.xz wireguard-openbsd-2ab43ed2e8d50089fbf0e754e34834e93be99ef9.zip | |
dont need to walk alldevs during sensor creation looking for the logical
disk scsibus when we record that in mfi_attach.
also happens to get rid of a logic error that let it come out of the loop
on alldevs with a reference to something that wasnt the logical disk
scsibus and use that.
Diffstat (limited to 'sys/kern/kern_rwlock.c')
0 files changed, 0 insertions, 0 deletions