implement atomic operations using ll/sc, and convert rw_cas and callers of the

pre-existing atomics to match.

tested on sgi (octane) and octeon (erl)
ok miod@ dlg@

20 files changed, 195 insertions, 85 deletions

diff --git a/sys/arch/mips64/include/atomic.h b/sys/arch/mips64/include/atomic.h
index 6c8a4abbf72..6db141e26f7 100644
--- a/sys/arch/mips64/include/atomic.h
+++ b/sys/arch/mips64/include/atomic.h
@@ -1,4 +1,4 @@
-/*	$OpenBSD: atomic.h,v 1.8 2014/03/29 18:09:30 guenther Exp $	*/
+/*	$OpenBSD: atomic.h,v 1.9 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /* Public Domain */
 
@@ -55,33 +55,158 @@ atomic_clearbits_int(volatile unsigned int *uip, unsigned int v)
 		"r"(uip), "r"(~v) : "memory");
 }
 
-static __inline void
-atomic_add_int(volatile unsigned int *uip, unsigned int v)
+
+static inline unsigned int
+_atomic_cas_uint(volatile unsigned int *p, unsigned int o, unsigned int n)
 {
-	unsigned int tmp;
+	unsigned int rv, wv;
 
 	__asm__ volatile (
-	"1:	ll	%0,	0(%1)\n"
-	"	addu	%0,	%2,	%0\n"
-	"	sc	%0,	0(%1)\n"
-	"	beqz	%0,	1b\n"
-	"	 nop\n" :
-		"=&r"(tmp) :
-		"r"(uip), "r"(v) : "memory");
+	"1:	ll	%0,	%1\n"
+	"	bne	%0,	%4,	2f\n"
+	"	move	%2,	%3\n"
+	"	sc	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"2:	nop\n"
+	    : "=&r" (rv), "+m" (*p), "=&r" (wv)
+	    : "r" (n), "Ir" (o));
+
+	return (rv);
 }
-static __inline void
-atomic_add_uint64(volatile uint64_t *uip, uint64_t v)
+#define atomic_cas_uint(_p, _o, _n) _atomic_cas_uint((_p), (_o), (_n))
+
+static inline unsigned long
+_atomic_cas_ulong(volatile unsigned long *p, unsigned long o, unsigned long n)
 {
-	uint64_t tmp;
+	unsigned long rv, wv;
 
 	__asm__ volatile (
-	"1:	lld	%0,	0(%1)\n"
-	"	daddu	%0,	%2,	%0\n"
-	"	scd	%0,	0(%1)\n"
-	"	beqz	%0,	1b\n"
-	"	 nop\n" :
-		"=&r"(tmp) :
-		"r"(uip), "r"(v) : "memory");
+	"1:	lld	%0,	%1\n"
+	"	bne	%0,	%4,	2f\n"
+	"	move	%2,	%3\n"
+	"	scd	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"2:	nop\n"
+	    : "=&r" (rv), "+m" (*p), "=&r" (wv)
+	    : "r" (n), "Ir" (o));
+
+	return (rv);
+}
+#define atomic_cas_ulong(_p, _o, _n) _atomic_cas_ulong((_p), (_o), (_n))
+
+static inline void *
+_atomic_cas_ptr(volatile void **p, void *o, void *n)
+{
+	void *rv, *wv;
+
+	__asm__ volatile (
+	"1:	lld	%0,	%1\n"
+	"	bne	%0,	%4,	2f\n"
+	"	move	%2,	%3\n"
+	"	scd	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"2:	nop\n"
+	    : "=&r" (rv), "+m" (*p), "=&r" (wv)
+	    : "r" (n), "Ir" (o));
+
+	return (rv);
 }
+#define atomic_cas_ptr(_p, _o, _n) _atomic_cas_ptr((_p), (_o), (_n))
+
+
+
+static inline unsigned int
+_atomic_swap_uint(volatile unsigned int *uip, unsigned int v)
+{
+	unsigned int o, t;
+
+	__asm__ volatile (
+	"1:	ll	%0,	%1\n"
+	"	move	%2,	%3\n"
+	"	sc	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"	nop\n" 
+	    : "=&r" (o), "+m" (*uip), "=&r" (t)
+	    : "r" (v));
+
+	return (o);
+}
+#define atomic_swap_uint(_p, _v) _atomic_swap_uint((_p), (_v))
+
+static inline unsigned long
+_atomic_swap_ulong(volatile unsigned long *uip, unsigned long v)
+{
+	unsigned long o, t;
+
+	__asm__ volatile (
+	"1:	lld	%0,	%1\n"
+	"	move	%2,	%3\n"
+	"	scd	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"	nop\n" 
+	    : "=&r" (o), "+m" (*uip), "=&r" (t)
+	    : "r" (v));
+
+	return (o);
+}
+#define atomic_swap_ulong(_p, _v) _atomic_swap_ulong((_p), (_v))
+
+
+static inline void *
+_atomic_swap_ptr(volatile void **uip, void *n)
+{
+	void *o, *t;
+
+	__asm__ volatile (
+	"1:	lld	%0,	%1\n"
+	"	move	%2,	%3\n"
+	"	scd	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"	nop\n"
+	    : "=&r" (o), "+m" (*uip), "=&r" (t)
+	    : "r" (n));
+
+	return (o);
+}
+#define atomic_swap_ptr(_p, _n) _atomic_swap_ptr((_p), (_n))
+
+static inline unsigned int
+_atomic_add_int_nv(volatile unsigned int *uip, unsigned int v)
+{
+	unsigned int rv, nv;
+
+	__asm__ volatile (
+	"1:	ll	%0,	%1\n"
+	"	addu	%2,	%0,	%3\n"
+	"	sc	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"	nop\n"
+	    : "=&r" (rv), "+m" (*uip), "=&r" (nv)
+	    : "Ir" (v));
+
+	return (rv + v);
+}
+#define atomic_add_int_nv(_uip, _v) _atomic_add_int_nv((_uip), (_v))
+#define atomic_sub_int_nv(_uip, _v) _atomic_add_int_nv((_uip), 0 - (_v))
+
+static inline unsigned long
+_atomic_add_long_nv(volatile unsigned long *uip, unsigned long v)
+{
+	unsigned long rv, nv;
+
+	__asm__ volatile (
+	"1:	lld	%0,	%1\n"
+	"	daddu	%2,	%0,	%3\n"
+	"	scd	%2,	%1\n"
+	"	beqz	%2,	1b\n"
+	"	nop\n"
+	    : "=&r" (rv), "+m" (*uip), "=&r" (nv)
+	    : "Ir" (v));
+
+	return (rv + v);
+}
+#define atomic_add_long_nv(_uip, _v) _atomic_add_long_nv((_uip), (_v))
+#define atomic_sub_long_nv(_uip, _v) _atomic_add_long_nv((_uip), 0 - (_v))
+
 #endif /* defined(_KERNEL) */
 #endif /* _MIPS64_ATOMIC_H_ */
diff --git a/sys/arch/mips64/include/lock.h b/sys/arch/mips64/include/lock.h
index 805128e802d..c19cd7362c5 100644
--- a/sys/arch/mips64/include/lock.h
+++ b/sys/arch/mips64/include/lock.h
@@ -1,38 +1,17 @@
-/*	$OpenBSD: lock.h,v 1.5 2013/05/21 20:05:30 tedu Exp $	*/
+/*	$OpenBSD: lock.h,v 1.6 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /* public domain */
 
 #ifndef	_MIPS64_LOCK_H_
 #define	_MIPS64_LOCK_H_
 
-#include <mips64/atomic.h>
+#include <sys/atomic.h>
 
 #define rw_cas __cpu_cas
 static __inline int
 __cpu_cas(volatile unsigned long *addr, unsigned long old, unsigned long new)
 {
-	int success, scratch0, scratch1;
-
-        __asm volatile(
-		".set noreorder\n"
-		"1:\n"
-		"lld	%0, (%5)\n"
-		"bne	%0, %3, 2f\n"
-		"move	%1, %4\n"
-		"scd	%1, (%5)\n"
-		"beqz	%1, 1b\n"
-		"move   %2, $0\n"
-		"j	3f\n"
-		"nop\n"
-		"2:\n"
-		"daddi   %2, $0, 1\n"
-		"3:\n"
-		".set reorder\n"
-		: "=&r"(scratch0), "=&r"(scratch1), "=&r"(success)
-		: "r"(old), "r"(new), "r"(addr)
-		: "memory");
-
-	return success;
+	return (atomic_cas_ulong(addr, old, new) != old);
 }
 
 #endif	/* _MIPS64_LOCK_H_ */
diff --git a/sys/arch/mips64/mips64/cpu.c b/sys/arch/mips64/mips64/cpu.c
index 30560b652cd..53b3808a0c5 100644
--- a/sys/arch/mips64/mips64/cpu.c
+++ b/sys/arch/mips64/mips64/cpu.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: cpu.c,v 1.55 2014/06/18 20:03:55 miod Exp $ */
+/*	$OpenBSD: cpu.c,v 1.56 2014/09/30 06:51:58 jmatthew Exp $ */
 
 /*
  * Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se)
@@ -378,7 +378,7 @@ enable_fpu(struct proc *p)
 		MipsSwitchFPState(ci->ci_fpuproc, p->p_md.md_regs);
 	else
 		MipsSwitchFPState16(ci->ci_fpuproc, p->p_md.md_regs);
-	atomic_add_int(&uvmexp.fpswtch, 1);
+	atomic_inc_int(&uvmexp.fpswtch);
 
 	ci->ci_fpuproc = p;
 	p->p_md.md_regs->sr |= SR_COP_1_BIT;
diff --git a/sys/arch/mips64/mips64/interrupt.c b/sys/arch/mips64/mips64/interrupt.c
index c9325b36813..821f7fb71af 100644
--- a/sys/arch/mips64/mips64/interrupt.c
+++ b/sys/arch/mips64/mips64/interrupt.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: interrupt.c,v 1.63 2012/10/03 11:18:23 miod Exp $ */
+/*	$OpenBSD: interrupt.c,v 1.64 2014/09/30 06:51:58 jmatthew Exp $ */
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -31,6 +31,7 @@
 #include <sys/kernel.h>
 #include <sys/proc.h>
 #include <sys/user.h>
+#include <sys/atomic.h>
 
 #include <uvm/uvm_extern.h>
 
@@ -118,14 +119,14 @@ interrupt(struct trap_frame *trapframe)
 #ifdef DEBUG_INTERRUPT
 	trapdebug_enter(ci, trapframe, T_INT);
 #endif
-	atomic_add_int(&uvmexp.intrs, 1);
+	atomic_inc_int(&uvmexp.intrs);
 
 	/* Mask out interrupts from cause that are unmasked */
 	pending = trapframe->cause & CR_INT_MASK & trapframe->sr;
 
 	if (pending & SOFT_INT_MASK_0) {
 		clearsoftintr0();
-		atomic_add_uint64(&soft_count.ec_count, 1);
+		atomic_inc_long((unsigned long *)&soft_count.ec_count);
 	}
 
 #ifdef RM7K_PERFCNTR
diff --git a/sys/arch/mips64/mips64/ipifuncs.c b/sys/arch/mips64/mips64/ipifuncs.c
index 6ecfcd7e0ce..febedd14845 100644
--- a/sys/arch/mips64/mips64/ipifuncs.c
+++ b/sys/arch/mips64/mips64/ipifuncs.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: ipifuncs.c,v 1.8 2011/05/10 07:58:47 syuu Exp $ */
+/* $OpenBSD: ipifuncs.c,v 1.9 2014/09/30 06:51:58 jmatthew Exp $ */
 /* $NetBSD: ipifuncs.c,v 1.40 2008/04/28 20:23:10 martin Exp $ */
 
 /*-
@@ -35,12 +35,12 @@
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <sys/proc.h>
+#include <sys/atomic.h>
 
 #include <uvm/uvm_extern.h>
 
 #include <machine/cpu.h>
 #include <machine/intr.h>
-#include <machine/atomic.h>
 
 static int	mips64_ipi_intr(void *);
 static void	mips64_ipi_nop(void);
diff --git a/sys/arch/mips64/mips64/pmap.c b/sys/arch/mips64/mips64/pmap.c
index 7cf749bf929..ccf92aacf75 100644
--- a/sys/arch/mips64/mips64/pmap.c
+++ b/sys/arch/mips64/mips64/pmap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: pmap.c,v 1.75 2014/05/10 22:25:16 jasper Exp $	*/
+/*	$OpenBSD: pmap.c,v 1.76 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2001-2004 Opsycon AB  (www.opsycon.se / www.opsycon.com)
@@ -35,6 +35,7 @@
 #ifdef SYSVSHM
 #include <sys/shm.h>
 #endif
+#include <sys/atomic.h>
 
 #include <mips64/cache.h>
 #include <machine/autoconf.h>
diff --git a/sys/arch/mips64/mips64/softintr.c b/sys/arch/mips64/mips64/softintr.c
index fc0e9ec97e7..df600f1ef82 100644
--- a/sys/arch/mips64/mips64/softintr.c
+++ b/sys/arch/mips64/mips64/softintr.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: softintr.c,v 1.17 2014/07/12 18:44:42 tedu Exp $	*/
+/*	$OpenBSD: softintr.c,v 1.18 2014/09/30 06:51:58 jmatthew Exp $	*/
 /*	$NetBSD: softintr.c,v 1.2 2003/07/15 00:24:39 lukem Exp $	*/
 
 /*
@@ -39,10 +39,10 @@
 #include <sys/param.h>
 #include <sys/mutex.h>
 #include <sys/malloc.h>
+#include <sys/atomic.h>
 
 #include <uvm/uvm_extern.h>
 
-#include <machine/atomic.h>
 #include <machine/intr.h>
 #ifdef MULTIPROCESSOR
 #include <mips64/mips_cpu.h>
@@ -91,7 +91,7 @@ softintr_dispatch(int si)
 		TAILQ_REMOVE(&siq->siq_list, sih, sih_list);
 		sih->sih_pending = 0;
 
-		atomic_add_int(&uvmexp.softs, 1);
+		atomic_inc_int(&uvmexp.softs);
 
 		mtx_leave(&siq->siq_mtx);
 
diff --git a/sys/arch/mips64/mips64/trap.c b/sys/arch/mips64/mips64/trap.c
index 783a8c0de76..477e5b73d63 100644
--- a/sys/arch/mips64/mips64/trap.c
+++ b/sys/arch/mips64/mips64/trap.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: trap.c,v 1.100 2014/08/18 17:23:06 miod Exp $	*/
+/*	$OpenBSD: trap.c,v 1.101 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 1988 University of Utah.
@@ -54,6 +54,7 @@
 #include <sys/syscall_mi.h>
 #include <sys/buf.h>
 #include <sys/device.h>
+#include <sys/atomic.h>
 #ifdef PTRACE
 #include <sys/ptrace.h>
 #endif
@@ -150,7 +151,7 @@ ast()
 
 	p->p_md.md_astpending = 0;
 
-	atomic_add_int(&uvmexp.softs, 1);
+	atomic_inc_int(&uvmexp.softs);
 	mi_ast(p, ci->ci_want_resched);
 	userret(p);
 }
@@ -179,7 +180,7 @@ trap(struct trap_frame *trapframe)
 #else
 	if (type != T_SYSCALL)
 #endif
-		atomic_add_int(&uvmexp.traps, 1);
+		atomic_inc_int(&uvmexp.traps);
 	if (USERMODE(trapframe->sr)) {
 		type |= T_USER;
 		refreshcreds(p);
@@ -475,7 +476,7 @@ fault_common_no_miss:
 		} args;
 		register_t rval[2];
 
-		atomic_add_int(&uvmexp.syscalls, 1);
+		atomic_inc_int(&uvmexp.syscalls);
 
 		/* compute next PC after syscall instruction */
 		tpc = trapframe->pc; /* Remember if restart */
diff --git a/sys/arch/octeon/dev/octeon_intr.c b/sys/arch/octeon/dev/octeon_intr.c
index 8b6e6d98b13..0da4f6823a0 100644
--- a/sys/arch/octeon/dev/octeon_intr.c
+++ b/sys/arch/octeon/dev/octeon_intr.c
@@ -35,11 +35,11 @@
 #include <sys/malloc.h>
 #include <sys/device.h>
 #include <sys/proc.h>
+#include <sys/atomic.h>
 
 #include <mips64/mips_cpu.h>
 
 #include <machine/autoconf.h>
-#include <machine/atomic.h>
 #include <machine/intr.h>
 #include <machine/octeonreg.h>
 
@@ -284,7 +284,8 @@ octeon_iointr(uint32_t hwpend, struct trap_frame *frame)
 #endif
 					if ((*ih->ih_fun)(ih->ih_arg) != 0) {
 						rc = 1;
-						atomic_add_uint64(&ih->ih_count.ec_count, 1);
+						atomic_inc_long((unsigned long *)
+						    &ih->ih_count.ec_count);
 					}
 #ifdef MULTIPROCESSOR
 					if (ih->ih_level < IPL_IPI) {
diff --git a/sys/arch/octeon/dev/octeon_iobus.c b/sys/arch/octeon/dev/octeon_iobus.c
index c74e8f3b347..3a5efe0ade2 100644
--- a/sys/arch/octeon/dev/octeon_iobus.c
+++ b/sys/arch/octeon/dev/octeon_iobus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: octeon_iobus.c,v 1.7 2014/07/09 23:03:22 pirofti Exp $ */
+/*	$OpenBSD: octeon_iobus.c,v 1.8 2014/09/30 06:51:58 jmatthew Exp $ */
 
 /*
  * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
@@ -38,9 +38,9 @@
 #include <sys/malloc.h>
 #include <sys/device.h>
 #include <sys/proc.h>
+#include <sys/atomic.h>
 
 #include <machine/autoconf.h>
-#include <machine/atomic.h>
 #include <machine/intr.h>
 #include <machine/octeonvar.h>
 #include <machine/octeonreg.h>
diff --git a/sys/arch/octeon/dev/octeon_uartbus.c b/sys/arch/octeon/dev/octeon_uartbus.c
index dfca44bd391..ef13cef42e5 100644
--- a/sys/arch/octeon/dev/octeon_uartbus.c
+++ b/sys/arch/octeon/dev/octeon_uartbus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: octeon_uartbus.c,v 1.4 2014/05/10 22:25:16 jasper Exp $ */
+/*	$OpenBSD: octeon_uartbus.c,v 1.5 2014/09/30 06:51:58 jmatthew Exp $ */
 
 /*
  * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
@@ -37,10 +37,10 @@
 #include <sys/malloc.h>
 #include <sys/device.h>
 #include <sys/proc.h>
+#include <sys/atomic.h>
 
 #include <machine/autoconf.h>
 #include <machine/intr.h>
-#include <machine/atomic.h>
 #include <machine/octeonreg.h>
 
 #include <octeon/dev/uartbusvar.h>
diff --git a/sys/arch/octeon/octeon/lock_machdep.c b/sys/arch/octeon/octeon/lock_machdep.c
index c3f6f512b72..cf23388c471 100644
--- a/sys/arch/octeon/octeon/lock_machdep.c
+++ b/sys/arch/octeon/octeon/lock_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock_machdep.c,v 1.4 2013/12/05 01:28:45 uebayasi Exp $	*/
+/*	$OpenBSD: lock_machdep.c,v 1.5 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
@@ -20,8 +20,8 @@
 #include <sys/param.h>
 #include <sys/lock.h>
 #include <sys/systm.h>
+#include <sys/atomic.h>
 
-#include <machine/atomic.h>
 #include <machine/cpu.h>
 #include <machine/lock.h>
 
diff --git a/sys/arch/sgi/localbus/int.c b/sys/arch/sgi/localbus/int.c
index 87dc791a665..4eba6335916 100644
--- a/sys/arch/sgi/localbus/int.c
+++ b/sys/arch/sgi/localbus/int.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: int.c,v 1.10 2014/05/19 21:18:42 miod Exp $	*/
+/*	$OpenBSD: int.c,v 1.11 2014/09/30 06:51:58 jmatthew Exp $	*/
 /*	$NetBSD: int.c,v 1.24 2011/07/01 18:53:46 dyoung Exp $	*/
 
 /*
@@ -39,6 +39,7 @@
 #include <sys/device.h>
 #include <sys/malloc.h>
 #include <sys/proc.h>
+#include <sys/atomic.h>
 
 #include <mips64/archtype.h>
 
@@ -297,8 +298,8 @@ int2_mappable_intr(void *arg)
 				ret = (*ih->ih.ih_fun)(ih->ih.ih_arg);
 				if (ret != 0) {
 					rc = 1;
-					atomic_add_uint64(&ih->ih.ih_count.ec_count,
-					    1);
+					atomic_inc_long((unsigned long *)
+					    &ih->ih.ih_count.ec_count);
 				}
 				if (ret == 1)
 					break;
diff --git a/sys/arch/sgi/localbus/macebus.c b/sys/arch/sgi/localbus/macebus.c
index 2bef5f29a4b..4081ca6956f 100644
--- a/sys/arch/sgi/localbus/macebus.c
+++ b/sys/arch/sgi/localbus/macebus.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: macebus.c,v 1.62 2014/05/19 21:18:42 miod Exp $ */
+/*	$OpenBSD: macebus.c,v 1.63 2014/09/30 06:51:58 jmatthew Exp $ */
 
 /*
  * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
@@ -38,13 +38,13 @@
 #include <sys/malloc.h>
 #include <sys/device.h>
 #include <sys/proc.h>
+#include <sys/atomic.h>
 
 #include <mips64/archtype.h>
 #include <mips64/mips_cpu.h>
 
 #include <machine/autoconf.h>
 #include <machine/intr.h>
-#include <machine/atomic.h>
 
 #include <sgi/localbus/crimebus.h>
 #include <sgi/localbus/macebus.h>
diff --git a/sys/arch/sgi/sgi/intr_template.c b/sys/arch/sgi/sgi/intr_template.c
index 3fe4dcf67c3..941b5a1ffba 100644
--- a/sys/arch/sgi/sgi/intr_template.c
+++ b/sys/arch/sgi/sgi/intr_template.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: intr_template.c,v 1.13 2012/09/29 19:24:31 miod Exp $	*/
+/*	$OpenBSD: intr_template.c,v 1.14 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2009 Miodrag Vallat.
@@ -170,7 +170,8 @@ INTR_FUNCTIONNAME(uint32_t hwpend, struct trap_frame *frame)
 					ret = (*ih->ih_fun)(ih->ih_arg);
 					if (ret != 0) {
 						rc = 1;
-						atomic_add_uint64(&ih->ih_count.ec_count, 1);
+						atomic_inc_long((unsigned long *)
+						    &ih->ih_count.ec_count);
 					}
 #ifdef MULTIPROCESSOR
 					if (ih->ih_level < IPL_IPI) {
diff --git a/sys/arch/sgi/sgi/ip27_machdep.c b/sys/arch/sgi/sgi/ip27_machdep.c
index cbb856e089d..a93e88f2140 100644
--- a/sys/arch/sgi/sgi/ip27_machdep.c
+++ b/sys/arch/sgi/sgi/ip27_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: ip27_machdep.c,v 1.63 2014/07/13 20:29:05 miod Exp $	*/
+/*	$OpenBSD: ip27_machdep.c,v 1.64 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009 Miodrag Vallat.
@@ -28,6 +28,7 @@
 #include <sys/malloc.h>
 #include <sys/reboot.h>
 #include <sys/tty.h>
+#include <sys/atomic.h>
 
 #include <mips64/arcbios.h>
 #include <mips64/archtype.h>
@@ -38,7 +39,6 @@
 #include <mips64/mips_cpu.h>
 #include <machine/memconf.h>
 #include <machine/mnode.h>
-#include <machine/atomic.h>
 
 #include <uvm/uvm_extern.h>
 
diff --git a/sys/arch/sgi/sgi/lock_machdep.c b/sys/arch/sgi/sgi/lock_machdep.c
index 3faee86b754..3dfa48044cc 100644
--- a/sys/arch/sgi/sgi/lock_machdep.c
+++ b/sys/arch/sgi/sgi/lock_machdep.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: lock_machdep.c,v 1.5 2013/12/05 01:28:45 uebayasi Exp $	*/
+/*	$OpenBSD: lock_machdep.c,v 1.6 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2007 Artur Grabowski <art@openbsd.org>
@@ -20,8 +20,8 @@
 #include <sys/param.h>
 #include <sys/lock.h>
 #include <sys/systm.h>
+#include <sys/atomic.h>
 
-#include <machine/atomic.h>
 #include <machine/cpu.h>
 #include <machine/lock.h>
 
diff --git a/sys/arch/sgi/xbow/xbow.c b/sys/arch/sgi/xbow/xbow.c
index 9857bb11c2e..10e86e5186f 100644
--- a/sys/arch/sgi/xbow/xbow.c
+++ b/sys/arch/sgi/xbow/xbow.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: xbow.c,v 1.34 2012/09/29 18:54:39 miod Exp $	*/
+/*	$OpenBSD: xbow.c,v 1.35 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009, 2011 Miodrag Vallat.
@@ -60,10 +60,10 @@
 #include <sys/conf.h>
 #include <sys/malloc.h>
 #include <sys/device.h>
+#include <sys/atomic.h>
 
 #include <mips64/archtype.h>
 
-#include <machine/atomic.h>
 #include <machine/autoconf.h>
 #include <machine/intr.h>
 #include <machine/mnode.h>
diff --git a/sys/arch/sgi/xbow/xbridge.c b/sys/arch/sgi/xbow/xbridge.c
index 478a5846c5a..7e386d77e1f 100644
--- a/sys/arch/sgi/xbow/xbridge.c
+++ b/sys/arch/sgi/xbow/xbridge.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: xbridge.c,v 1.91 2014/08/19 19:04:07 miod Exp $	*/
+/*	$OpenBSD: xbridge.c,v 1.92 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2008, 2009, 2011  Miodrag Vallat.
@@ -37,8 +37,8 @@
 #include <sys/mbuf.h>
 #include <sys/mutex.h>
 #include <sys/queue.h>
+#include <sys/atomic.h>
 
-#include <machine/atomic.h>
 #include <machine/autoconf.h>
 #include <machine/bus.h>
 #include <machine/cpu.h>
diff --git a/sys/arch/sgi/xbow/xheart.c b/sys/arch/sgi/xbow/xheart.c
index 75d18ebcd27..19d56516461 100644
--- a/sys/arch/sgi/xbow/xheart.c
+++ b/sys/arch/sgi/xbow/xheart.c
@@ -1,4 +1,4 @@
-/*	$OpenBSD: xheart.c,v 1.26 2014/07/12 18:44:42 tedu Exp $	*/
+/*	$OpenBSD: xheart.c,v 1.27 2014/09/30 06:51:58 jmatthew Exp $	*/
 
 /*
  * Copyright (c) 2008 Miodrag Vallat.
@@ -27,8 +27,8 @@
 #include <sys/evcount.h>
 #include <sys/malloc.h>
 #include <sys/timetc.h>
+#include <sys/atomic.h>
 
-#include <machine/atomic.h>
 #include <machine/autoconf.h>
 #include <machine/cpu.h>
 #include <mips64/mips_cpu.h>