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authorderaadt <deraadt@openbsd.org>2012-10-18 21:40:49 +0000
committerderaadt <deraadt@openbsd.org>2012-10-18 21:40:49 +0000
commitdd4c2571338e4948277bcdad2b17a495286fd535 (patch)
treeb13d340c016fbf2825712ccc506864fee30afe49 /sys
parentnumerous error message fixes: (diff)
downloadwireguard-openbsd-dd4c2571338e4948277bcdad2b17a495286fd535.tar.xz
wireguard-openbsd-dd4c2571338e4948277bcdad2b17a495286fd535.zip
Use pci_set_powerstate() unconditionally for all chip variants, rather
than a kludged together chunk of code for just one chip, which happens to be entirely wrong. We need to watch for regressions on cardbus, though. ok kettenis
Diffstat (limited to 'sys')
-rw-r--r--sys/dev/pci/pccbb.c11
-rw-r--r--sys/dev/pci/pccbbreg.h10
2 files changed, 5 insertions, 16 deletions
diff --git a/sys/dev/pci/pccbb.c b/sys/dev/pci/pccbb.c
index e2d233d766e..6136d2ed2c1 100644
--- a/sys/dev/pci/pccbb.c
+++ b/sys/dev/pci/pccbb.c
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbb.c,v 1.88 2012/10/08 21:47:50 deraadt Exp $ */
+/* $OpenBSD: pccbb.c,v 1.89 2012/10/18 21:40:49 deraadt Exp $ */
/* $NetBSD: pccbb.c,v 1.96 2004/03/28 09:49:31 nakayama Exp $ */
/*
@@ -606,6 +606,9 @@ pccbb_chipinit(struct pccbb_softc *sc)
pcitag_t tag = sc->sc_tag;
pcireg_t reg;
+ /* Power on the controller if the BIOS didn't */
+ pci_set_powerstate(pc, tag, PCI_PMCSR_STATE_D0);
+
/*
* Set PCI command reg.
* Some laptop's BIOSes (i.e. TICO) do not enable CardBus chip.
@@ -730,12 +733,6 @@ pccbb_chipinit(struct pccbb_softc *sc)
bus_space_write_1(sc->sc_base_memt, sc->sc_base_memh,
0x800 + 0x3e, bus_space_read_1(sc->sc_base_memt,
sc->sc_base_memh, 0x800 + 0x3e) | 0x03);
-
- /* Power on the controller if the BIOS didn't */
- reg = pci_conf_read(pc, tag, TOPIC100_PMCSR);
- if ((reg & TOPIC100_PMCSR_MASK) != TOPIC100_PMCSR_D0)
- pci_conf_write(pc, tag, TOPIC100_PMCSR,
- (reg & ~TOPIC100_PMCSR_MASK) | TOPIC100_PMCSR_D0);
break;
case CB_OLDO2MICRO:
diff --git a/sys/dev/pci/pccbbreg.h b/sys/dev/pci/pccbbreg.h
index bb492a6cb93..60b3c7c53eb 100644
--- a/sys/dev/pci/pccbbreg.h
+++ b/sys/dev/pci/pccbbreg.h
@@ -1,4 +1,4 @@
-/* $OpenBSD: pccbbreg.h,v 1.11 2010/01/13 09:10:33 jsg Exp $ */
+/* $OpenBSD: pccbbreg.h,v 1.12 2012/10/18 21:40:49 deraadt Exp $ */
/* $NetBSD: pccbbreg.h,v 1.5 2000/06/07 09:02:47 haya Exp $ */
/*
* Copyright (c) 1999 HAYAKAWA Koichi. All rights reserved.
@@ -238,14 +238,6 @@
#define TOPIC_REG_CTRL_CAUDIO_INVERT 0x00000001
/*
- * Additional (subset of) Topic100 registers from
- * Toshiba datasheet (Draft Rev. 01.4) 98/10/07
- */
-#define TOPIC100_PMCSR 0x84 /* Power mgmt ctrl/stat register */
-#define TOPIC100_PMCSR_MASK 0x00000003
-#define TOPIC100_PMCSR_D0 0x0
-
-/*
* Additional O2Micro registers
*
* 'reserved' register at 0x94/D4. allows setting read prefetch and write