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author | 2012-07-14 19:53:27 +0000 | |
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committer | 2012-07-14 19:53:27 +0000 | |
commit | 64ac1c5a7e13fbe4130b9b53f956c4ebff13c665 (patch) | |
tree | fe69b032a82409ce35d45d17204836b5d7cd85d6 /usr.bin/cu/command.c | |
parent | Split the existing mips64 clock code into time-of-day and generic duties in (diff) | |
download | wireguard-openbsd-64ac1c5a7e13fbe4130b9b53f956c4ebff13c665.tar.xz wireguard-openbsd-64ac1c5a7e13fbe4130b9b53f956c4ebff13c665.zip |
A known errata of R4000 and R4400 processors, is that reading the internal
counter register close to a trigger of the counter interrupt, may cause the
interrupt not to be generated. This makes it a bad idea to use the internal
counter both for the scheduling clock and for delay().
Therefore, on IP22 systems (and IP28 because it makes my life easier), use
one of the two 8254 timers connected to the onboard interrupt controller as
the scheduling clock source.
Adapted from NetBSD.
Diffstat (limited to 'usr.bin/cu/command.c')
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