diff options
| -rw-r--r-- | sys/arch/loongson/dev/bonito.c | 8 | ||||
| -rw-r--r-- | sys/arch/loongson/loongson/loongson2_machdep.c | 4 | ||||
| -rw-r--r-- | sys/arch/loongson/loongson/machdep.c | 21 | ||||
| -rw-r--r-- | sys/arch/mips64/include/cpu.h | 4 | ||||
| -rw-r--r-- | sys/arch/mips64/mips64/cpu.c | 17 |
5 files changed, 41 insertions, 13 deletions
diff --git a/sys/arch/loongson/dev/bonito.c b/sys/arch/loongson/dev/bonito.c index f09d5acb741..daf6c1ef3c7 100644 --- a/sys/arch/loongson/dev/bonito.c +++ b/sys/arch/loongson/dev/bonito.c @@ -1,4 +1,4 @@ -/* $OpenBSD: bonito.c,v 1.18 2010/12/04 17:06:31 miod Exp $ */ +/* $OpenBSD: bonito.c,v 1.19 2011/03/31 20:37:44 miod Exp $ */ /* $NetBSD: bonito_mainbus.c,v 1.11 2008/04/28 20:23:10 martin Exp $ */ /* $NetBSD: bonito_pci.c,v 1.5 2008/04/28 20:23:28 martin Exp $ */ @@ -223,7 +223,7 @@ bonito_attach(struct device *parent, struct device *self, void *aux) * We need to make sure we never try to access an unimplemented * register... */ - if (loongson_ver == 0x2f) + if (loongson_ver >= 0x2f) sc->sc_compatible = 0; else sc->sc_compatible = 1; @@ -312,7 +312,7 @@ bonito_attach(struct device *parent, struct device *self, void *aux) bonito_intem |= BONITO_INTRMASK_MASTERERR; } - if (loongson_ver == 0x2f) + if (loongson_ver >= 0x2f) set_intr(INTPRI_BONITO, CR_INT_4, bonito_intr_2f); else set_intr(INTPRI_BONITO, CR_INT_0, bonito_intr_2e); @@ -1046,7 +1046,7 @@ bonito_mem_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size, int flags, * Try a PCIHI mapping first. */ - if (loongson_ver == 0x2f) { + if (loongson_ver >= 0x2f) { if (offs >= LS2F_PCIHI_BASE && end <= LS2F_PCIHI_TOP) { *bshp = t->bus_base + offs; return 0; diff --git a/sys/arch/loongson/loongson/loongson2_machdep.c b/sys/arch/loongson/loongson/loongson2_machdep.c index 37eb3734e1d..427ddb4037b 100644 --- a/sys/arch/loongson/loongson/loongson2_machdep.c +++ b/sys/arch/loongson/loongson/loongson2_machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: loongson2_machdep.c,v 1.10 2010/05/08 21:59:56 miod Exp $ */ +/* $OpenBSD: loongson2_machdep.c,v 1.11 2011/03/31 20:37:44 miod Exp $ */ /* * Copyright (c) 2009, 2010 Miodrag Vallat. @@ -257,7 +257,7 @@ is_memory_range(paddr_t pa, psize_t len, psize_t limit) * Allow access to the low 256MB aliased region on 2F systems, * if we are accessing memory at 2GB onwards. */ - if (pa < 0x10000000 && loongson_ver == 0x2f) { + if (pa < 0x10000000 && loongson_ver >= 0x2f) { fp += mem_layout[0].mem_first_page - 1; lp += mem_layout[0].mem_first_page - 1; } diff --git a/sys/arch/loongson/loongson/machdep.c b/sys/arch/loongson/loongson/machdep.c index f675c573144..f43be417862 100644 --- a/sys/arch/loongson/loongson/machdep.c +++ b/sys/arch/loongson/loongson/machdep.c @@ -1,4 +1,4 @@ -/* $OpenBSD: machdep.c,v 1.26 2011/03/27 15:28:54 miod Exp $ */ +/* $OpenBSD: machdep.c,v 1.27 2011/03/31 20:37:44 miod Exp $ */ /* * Copyright (c) 2009, 2010 Miodrag Vallat. @@ -275,7 +275,20 @@ mips_init(int32_t argc, int32_t argv, int32_t envp, int32_t cv, prid = cp0_get_prid(); switch ((prid >> 8) & 0xff) { case MIPS_LOONGSON2: - loongson_ver = 0x2c + (prid & 0xff); + switch (prid & 0xff) { + case 0x00: + loongson_ver = 0x2c; + break; + case 0x02: + loongson_ver = 0x2e; + break; + case 0x03: + loongson_ver = 0x2f; + break; + case 0x05: + loongson_ver = 0x3a; + break; + } if (loongson_ver == 0x2e || loongson_ver == 0x2f) break; /* FALLTHROUGH */ @@ -389,7 +402,8 @@ mips_init(int32_t argc, int32_t argv, int32_t envp, int32_t cv, goto unsupported; } - if (memlo == 256) { + /* 3A PMON only reports up to 240MB as low memory */ + if (memlo >= 240) { envvar = pmon_getenv("highmemsize"); if (envvar == NULL) memhi = 0; @@ -412,6 +426,7 @@ mips_init(int32_t argc, int32_t argv, int32_t envp, int32_t cv, break; default: case 0x2f: + case 0x3a: loongson2f_setup(memlo, memhi); break; } diff --git a/sys/arch/mips64/include/cpu.h b/sys/arch/mips64/include/cpu.h index 3438add409e..d53bb477dc0 100644 --- a/sys/arch/mips64/include/cpu.h +++ b/sys/arch/mips64/include/cpu.h @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.h,v 1.70 2011/03/23 16:54:36 pirofti Exp $ */ +/* $OpenBSD: cpu.h,v 1.71 2011/03/31 20:37:44 miod Exp $ */ /*- * Copyright (c) 1992, 1993 @@ -540,7 +540,7 @@ void cpu_startclock(struct cpu_info *); #define MIPS_RM9000 0x34 /* PMCS RM9000 CPU ISA IV */ #define MIPS_LOONGSON 0x42 /* STC LoongSon CPU ISA III */ #define MIPS_VR5400 0x54 /* NEC Vr5400 CPU ISA IV+ */ -#define MIPS_LOONGSON2 0x63 /* STC LoongSon2 CPU ISA III */ +#define MIPS_LOONGSON2 0x63 /* STC LoongSon2/3 CPU ISA III+ */ /* * MIPS FPU types. Only soft, rest is the same as cpu type. diff --git a/sys/arch/mips64/mips64/cpu.c b/sys/arch/mips64/mips64/cpu.c index fe8fe1a4e52..863d261bc9c 100644 --- a/sys/arch/mips64/mips64/cpu.c +++ b/sys/arch/mips64/mips64/cpu.c @@ -1,4 +1,4 @@ -/* $OpenBSD: cpu.c,v 1.36 2010/11/24 21:16:28 miod Exp $ */ +/* $OpenBSD: cpu.c,v 1.37 2011/03/31 20:37:44 miod Exp $ */ /* * Copyright (c) 1997-2004 Opsycon AB (www.opsycon.se) @@ -166,7 +166,20 @@ cpuattach(struct device *parent, struct device *dev, void *aux) printf("PMC-Sierra RM9000 CPU"); break; case MIPS_LOONGSON2: - printf("STC Loongson2%c CPU", 'C' + vers_min); + switch (ch->c0prid & 0xff) { + case 0x00: + case 0x02: + case 0x03: + printf("STC Loongson2%c CPU", 'C' + vers_min); + break; + case 0x05: + printf("STC Loongson3%c CPU", 'A' + vers_min - 5); + break; + default: + printf("Unknown STC Loongson CPU type (%02x)", + ch->c0prid & 0xff); + break; + } displayver = 0; break; case MIPS_OCTEON: |