diff options
Diffstat (limited to 'gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp')
| -rw-r--r-- | gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp | 41 |
1 files changed, 36 insertions, 5 deletions
diff --git a/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp index 03c82f46da6..613598dbe21 100644 --- a/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp +++ b/gnu/llvm/lib/CodeGen/MachineRegisterInfo.cpp @@ -24,9 +24,8 @@ using namespace llvm; // Pin the vtable to this file. void MachineRegisterInfo::Delegate::anchor() {} -MachineRegisterInfo::MachineRegisterInfo(const MachineFunction *MF) - : MF(MF), TheDelegate(nullptr), IsSSA(true), TracksLiveness(true), - TracksSubRegLiveness(false) { +MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) + : MF(MF), TheDelegate(nullptr), TracksSubRegLiveness(false) { unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); VRegInfo.reserve(256); RegAllocHints.reserve(256); @@ -42,6 +41,11 @@ MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) { VRegInfo[Reg].first = RC; } +void MachineRegisterInfo::setRegBank(unsigned Reg, + const RegisterBank &RegBank) { + VRegInfo[Reg].first = &RegBank; +} + const TargetRegisterClass * MachineRegisterInfo::constrainRegClass(unsigned Reg, const TargetRegisterClass *RC, @@ -103,6 +107,32 @@ MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass){ return Reg; } +unsigned +MachineRegisterInfo::getSize(unsigned VReg) const { + VRegToSizeMap::const_iterator SizeIt = getVRegToSize().find(VReg); + return SizeIt != getVRegToSize().end() ? SizeIt->second : 0; +} + +void MachineRegisterInfo::setSize(unsigned VReg, unsigned Size) { + getVRegToSize()[VReg] = Size; +} + +unsigned +MachineRegisterInfo::createGenericVirtualRegister(unsigned Size) { + assert(Size && "Cannot create empty virtual register"); + + // New virtual register number. + unsigned Reg = TargetRegisterInfo::index2VirtReg(getNumVirtRegs()); + VRegInfo.grow(Reg); + // FIXME: Should we use a dummy register class? + VRegInfo[Reg].first = static_cast<TargetRegisterClass *>(nullptr); + getVRegToSize()[Reg] = Size; + RegAllocHints.grow(Reg); + if (TheDelegate) + TheDelegate->MRI_NoteNewVirtualRegister(Reg); + return Reg; +} + /// clearVirtRegs - Remove all virtual registers (after physreg assignment). void MachineRegisterInfo::clearVirtRegs() { #ifndef NDEBUG @@ -471,13 +501,14 @@ static bool isNoReturnDef(const MachineOperand &MO) { !Called->hasFnAttribute(Attribute::NoUnwind)); } -bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg) const { +bool MachineRegisterInfo::isPhysRegModified(unsigned PhysReg, + bool SkipNoReturnDef) const { if (UsedPhysRegMask.test(PhysReg)) return true; const TargetRegisterInfo *TRI = getTargetRegisterInfo(); for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { for (const MachineOperand &MO : make_range(def_begin(*AI), def_end())) { - if (isNoReturnDef(MO)) + if (!SkipNoReturnDef && isNoReturnDef(MO)) continue; return true; } |
