| Commit message (Collapse) | Author | Age | Files | Lines |
| | |
|
| |
|
|
|
|
|
|
| |
"hard-quad-float" feature is available. Add missing replacement
instruction patterns that are needed to emit alternative code for
conditional moves of quad-precision floats.
ok mortimer@
|
| |
|
|
|
|
|
|
|
| |
Prepared with help from jsg@ and mortimer@
Tested on amd64 by bcallah@, krw@, naddy@
Tested on arm64 by patrick@
Tested on macppc by kettenis@
Tested on octeon by visa@
Tested on sparc64 by claudio@
|
| |
|
|
|
| |
With fixes from mortimer@ (thanks!)
Tested by many, especially naddy@ (thanks!)
|
| |
|
|
|
|
|
| |
Without this, values get truncated to 32-bit. Makes a sparc64 kernel
actually work when compiled with clang.
ok pguenther@, visa@
|
| |
|
|
| |
"where is the kaboom?" deraadt@
|
| | |
|
| |
|
|
| |
development effort on OpenBSD/arm64.
|
| | |
|
|
|
ok hackroom@
|