| Commit message (Collapse) | Author | Age | Files | Lines |
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gnu/ directory.
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Makes exception handling work on powerpc64.
ok patrick@
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From drahn@
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on sparc64
Discrepancy spotted in
http://build-failures.rhaalovely.net/sparc64/2020-04-03/devel/llvm,,-main.log
Input from gkoehler@, ok kettenis@ deraadt@
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Defer saving the altivec registers until we need to access them (like
how arm defers saving the VFP registers). This prevents a SIGILL on a
G3 cpu when code throws a C++ exception.
ok kettenis@
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Ports build by naddy@
Tested by visa on octeon
Tested by kettenis on macppc and sparc64
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Caching implemented via red-black trees, this can be improved and
further work is on-going to bring it closer to GNU's performance that
uses a LRU-MRU 8-entries based caching algorithm.
Prompted by robert@ who run into a runtime of an executed macro of
5 minutes in libreoffice. With this the execution is reduced to 58 seconds.
C++11 tips from espie@, rsadowski@
Tested by robert@
OK mortimer@, kettenis@.
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understands.
ok mpi@, visa@
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Tested by visa on octeon
Tested by kettenis on arm64, armv7 and sparc64
"go for it" deraadt and sthen
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consistent across the various low-level interfaces that handle the
instruction pointer, reality turns out to be a bit more subtle.
On SPARC, DWARF2 uses r15 (which maps to %o7) as the return address column.
This means that we should not add/subtract 8 when it reads/updates the
register state while processing DWARF2 instructions. That in turn means
that getIP() and setIP() should not have been changed in my previous commit.
ok visa@
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ok guenther@, deraadt@, patrick@, dlg@, visa@
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Upstream reference:
https://reviews.llvm.org/D41968
OK kettenis@
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ok visa@
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clang on that platform.
ok millert@
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dl_unwind_find_exidx prototype.
ok guenther@
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ok patrick@
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does not produce the binary table which is used for optimization.
libunwind currently depends on having that table. This changes
libunwind to fall back to the default search code when the binary table
is not available.
ok kettenis@
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ok kettenis@
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