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2021-04-03Add a guard page between I/O virtual address space allocations. The ideapatrick1-3/+4
2021-04-03Exclude the first page from I/O virtual address space, which is the NULLpatrick1-3/+4
2021-04-02Fix Dale's email addresstb4-8/+8
2021-03-29Turns out the PCIe DARTs support a full 32-bit device virtual address space.kettenis1-4/+9
2021-03-29Fix IA32_EPT_VPID_CAP_XO_TRANSLATIONS specificationdv1-2/+2
2021-03-27Make sure that all CPUs end up with the same bits set in SCTLR_EL1.kettenis2-26/+27
2021-03-27Add ARMv8.5 instruction set related CPU features.kettenis2-4/+184
2021-03-26Return EOPNOTSUPP for unsupported ioctlskn1-16/+6
2021-03-26Fix "mach dtb" return code to avoid bogus bootkn1-6/+8
2021-03-26Fix errno, merge ioctl caseskn1-13/+5
2021-03-25remove uneeded includes in md armv7 filesjsg69-307/+71
2021-03-24The logic in mmrw() to check whether an address is within directbluhm1-4/+4
2021-03-23Pack the SPCR struct definition since the struct isn't naturally alignedpatrick1-2/+2
2021-03-22Now that MSI pages are properly mapped, all that debug code in smmu(4)patrick1-34/+2
2021-03-22Load MSI pages through bus_dma(9). Our interrupt controllers for MSIspatrick4-17/+99
2021-03-21Disambiguate expressions.visa1-3/+3
2021-03-19another unfortunate action to cope with relentless kernel growthderaadt1-2/+2
2021-03-17Add missing memory clobbers to "data" barriers.kettenis3-11/+11
2021-03-17Always use an allocated buffer for {Read,Write}Blocks() to makeyasuoka2-80/+34
2021-03-16Node without a "status" property should be considered enabled as well.kettenis1-3/+3
2021-03-16Make sure that switching the console from serial to framebuffer workskettenis2-22/+25
2021-03-16acpi_intr_disestablish() should free its own cookie.patrick1-1/+2
2021-03-16Bump MAXTSIZ to 256MB on i386.kurt1-2/+2
2021-03-16Fix some correctness issues in the lowelevel kernel bringup code.kettenis3-5/+20
2021-03-15Add code to acpiiort(4) to look up named components in the IORT andpatrick3-4/+80
2021-03-15Change API of acpiiort(4). It was written as a hook before, taking thepatrick7-33/+23
2021-03-15Add acpi_iommu_device_map(), which replaces the DMA tag with one thatpatrick3-3/+21
2021-03-15Don't put an extern variable (ppc_kvm_stolen) into vmparam.h, other instancesderaadt2-6/+3
2021-03-13We can use memory marked as EfiBootServicesCode or EfiBootServicesDatakettenis1-3/+6
2021-03-11spellingjsg140-331/+331
2021-03-11Add SMP support.kettenis1-13/+98
2021-03-11grow media a littlederaadt1-2/+2
2021-03-10Let MAIR comment catch up with reality.kettenis1-2/+5
2021-03-10pmap_avail_setup() is the only place physmem is calculated, delete a bunchderaadt1-9/+2
2021-03-09Node without a "status" property should be considered enabled as well.kettenis1-3/+3
2021-03-09Recognize Apple Firestorm cores.kettenis1-1/+3
2021-03-09Add initial bits for Check Point UTM-1 EDGE N.visa3-3/+15
2021-03-09ofw_read_mem_regions() can skip calculation of physmem. pmap.cderaadt1-5/+1
2021-03-08Enable ixl(4).patrick2-2/+4
2021-03-08Revise the ASID allocation sheme to avoid a hang when running out of freekettenis2-31/+120
2021-03-07Explicitly align kernel text.mortimer2-5/+6
2021-03-06Since with the current design there's one device per domain, and onepatrick1-17/+11
2021-03-06One major issue talked about in research papers is reducing the overheadpatrick1-61/+103
2021-03-06ansijsg2-6/+4
2021-03-05Improve readability of softc accesses.patrick1-13/+20
2021-03-05Introduce an IOVA allocator instead of mapping pages 1:1. Mapping pages 1:1patrick2-105/+128
2021-03-05Extend the commented code that shows which additional mappings are needed,patrick1-6/+24
2021-03-04Turns out the cores on Apple's M1 SoC only support 8-bit ASIDs.kettenis1-52/+57
2021-03-04Print feature that indicates a CPU core supports 16-bit ASIDs.kettenis1-1/+13
2021-03-04Tweak whitespace and adjust prototypes.visa1-23/+21