| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Mitigate Intel's Microarchitectural Data Sampling vulnerability. |   guenther | 2019-05-17 | 1 | -1/+4 |
| * | vmm: add host side pvclock |   pd | 2019-05-13 | 1 | -1/+5 |
| * | vmm: add a x86 page table walker | pd | 2019-05-12 | 1 | -1/+2 |
| * | vmm(4): Don't advertise support for SSBD and related speculative exec |   mlarkin | 2019-04-01 | 1 | -1/+6 |
| * | vmm(4): Don't advertise support for MCE/MCA since we don't implement | mlarkin | 2019-04-01 | 1 | -2/+3 |
| * | Bump VMM_MAX_NAME_LEN to 64 to allow for longer vm names. |   ajacoutot | 2019-03-02 | 1 | -2/+2 |
| * | vmm(4): allow preservation and restoration of guest debug registers | mlarkin | 2019-02-20 | 1 | -2/+22 |
| * | vmm(4): Clear the guest MWAITX/MONITORX extended CPUID feature bit, |   brynet | 2018-09-20 | 1 | -3/+4 |
| * | Perform mitigations for Intel L1TF screwup. There are three options: |   deraadt | 2018-08-21 | 1 | -2/+2 |
| * | zap an extra newline | mlarkin | 2018-07-12 | 1 | -2/+1 |
| * | vmm(8)/vmm(4): send a copy of the guest register state to vmd on exit, | mlarkin | 2018-07-12 | 1 | -13/+18 |
| * | vmm(4): return proper cache topology for cpuid(0x4) | mlarkin | 2018-07-11 | 1 | -1/+6 |
| * | forgot to commit vmmvar.h needed by previous two commits, thanks ccardenas | mlarkin | 2018-07-05 | 1 | -1/+10 |
| * | vmm(4): pass through ELCRx ports to vmd(8) | mlarkin | 2018-04-27 | 1 | -2/+4 |
| * | vmm(4): passthrough port 0x61 to vmd(8) | mlarkin | 2018-04-26 | 1 | -1/+6 |
| * | Remove RDTSCP from the CPUID flags reported to the guest VM. The instruction | mlarkin | 2018-03-29 | 1 | -1/+7 |
| * | make vmm(4) less responsible for initial register state, preferring to let | mlarkin | 2017-11-29 | 1 | -2/+6 |
| * | add some comments. no functional change | mlarkin | 2017-11-29 | 1 | -6/+18 |
| * | vmmvar.h changes for upcoming cdrom support in vmd(8). | mlarkin | 2017-11-17 | 1 | -1/+3 |
| * | vmd: Allow only upward migration | pd | 2017-08-20 | 1 | -1/+65 |
| * | vmm: add #defines for exception vectors that can be used to inject | mlarkin | 2017-08-14 | 1 | -1/+26 |
| * | vmm: handle IA32_MISC_ENABLE MSR. Bits set in this MSR can result in | mlarkin | 2017-08-12 | 1 | -3/+4 |
| * | vmm: support more than 3855MB guest memory | mlarkin | 2017-08-05 | 1 | -3/+3 |
| * | Make max memory for VMs equal to MAXDSIZ to avoid failing later during | mlarkin | 2017-07-12 | 1 | -2/+2 |
| * | vmd: increase the max number of disks from 2 to 4. Requires kernel rebuild | mlarkin | 2017-07-06 | 1 | -2/+2 |
| * | event injection framework, will be used for other features coming shortly | mlarkin | 2017-05-30 | 1 | -1/+3 |
| * | FPU context save/restore for SVM in vmm(4), matches a previous diff | mlarkin | 2017-05-30 | 1 | -1/+22 |
| * | rename some fields | mlarkin | 2017-05-28 | 1 | -4/+4 |
| * | Respect max VPID/ASID limits. VMX VPIDs are capped at 4095, for now. | mlarkin | 2017-05-19 | 1 | -1/+2 |
| * | Allow setting guest %xcr0 from vmd(8). | mlarkin | 2017-05-05 | 1 | -2/+3 |
| * | Allow setting of guest MSRs from vmd(8). This change is the first part of | mlarkin | 2017-05-02 | 1 | -2/+13 |
| * | vmm: don't use invvpid if we didn't detect vpid capability during | mlarkin | 2017-04-28 | 1 | -1/+2 |
| * | rename a struct that was denoted as "VMX only" to make it more clear | mlarkin | 2017-04-27 | 1 | -6/+7 |
| * | vmm(4): proper save/restore of FPU context during entry/exit. | mlarkin | 2017-04-27 | 1 | -1/+12 |
| * | Bump the emulated PCI MMIO range end to 0xFFFFFFFF. This slightly | mlarkin | 2017-03-23 | 1 | -2/+2 |
| * | SVM: asm support for SVM/RVI | mlarkin | 2017-02-20 | 1 | -1/+3 |
| * | SVM: misspelled field name in vmcb struct (renamed to match SVM code I'm | mlarkin | 2017-01-24 | 1 | -2/+2 |
| * | forgot this in previous commit (SVM_MSR* macro definitions) | mlarkin | 2017-01-19 | 1 | -1/+5 |
| * | rename a couple of macros that are causing me a merge headache with the | mlarkin | 2017-01-19 | 1 | -3/+3 |
| * | SVM: vcpu_init_svm - allocate memory for control structures (vmcb, | mlarkin | 2017-01-19 | 1 | -1/+7 |
| * | Starting to merge my old AMD SVM/RVI tree, piece by piece. | mlarkin | 2017-01-13 | 1 | -1/+104 |
| * | Remove vc_hsa_stack_va, it has not been used in a long time and is no | mlarkin | 2017-01-12 | 1 | -2/+1 |
| * | SVM intercept codes (exit reason) defines | mlarkin | 2017-01-11 | 1 | -1/+148 |
| * | Don't use a bitfield in the msr store index structure. This may not end up | mlarkin | 2016-10-26 | 1 | -3/+3 |
| * | Allow 4 vio(4) interfaces in each VM. Also fix a bad interrupt assignment that | mlarkin | 2016-10-12 | 1 | -2/+2 |
| * | add a debug function that was useful in finding the previous | mlarkin | 2016-10-06 | 1 | -1/+6 |
| * | disable PAT and MTRR in guest VMs | mlarkin | 2016-10-03 | 1 | -2/+2 |
| * | Restrict MSR access to supported ones, log invalid accesses. | mlarkin | 2016-09-04 | 1 | -1/+5 |
| * | Make vcpu_reset_regs use new writeregs code |   stefan | 2016-09-01 | 1 | -28/+2 |
| * | Add ioctls to get/set VCPU registers | stefan | 2016-09-01 | 1 | -1/+60 |
